Mask pattern correction process, photomask and semiconductor...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S009000, C430S030000

Reexamination Certificate

active

06303251

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a mask pattern correction process for making corrections, beforehand, on a mask geometric pattern for use in the manufacture of semiconductor integrated circuit devices or the like in order to obtain a transferred image that is close to a desired design pattern. The invention also relates to photomasks having mask patterns corrected by the above mask pattern correction method. Further, the invention relates to semiconductor integrated circuit devices manufactured by use of photomasks having mask patterns corrected by the above mask pattern correction method.
2. Prior Art
A photolithographic process is essentially involved in the current manufacture of semiconductor integrated circuit devices and the like. A predominate photolithographic process is such a process that a semiconductor mask pattern created with the aid of a computer assisted design (CAD) system is transferred onto a resistmaterial on the substrate of a semiconductor device, using an exposure light source.
With the recent trend toward smaller semiconductor integrated circuit devices, design rules are becoming increasingly smaller. As smaller design rules are sought, lithography needs to be carried out in the proximity of a limit of wavelength of the light source in the exposure system. This has lead to decreases in the resolution of the exposure system and, in consequence, mask patterns after transferring are deviated from their original design patterns.
One of causes of such deviation in pattern is “optical proximity effects”. These effects area phenomenon in which the diffraction and interference of light occur when a mask pattern is transferred onto a light-sensitive film applied to a wafer, using exposure light which has passed through the patterned openings of a mask, so that the mask pattern cannot be correctly imaged on the wafer. This phenomenon results in degradation of the mask pattern after transferring onto the wafer.
As an actual phenomenon, the optical proximity effects can be divided into two effects, that is, a self-light proximity effect and mutual-light proximity effect. The self-light proximity effect causes size reduction in isolated patterns so that they become smaller than their design values as shown in FIG.
9
(
a
), whereas the mutual-light proximity effect causes size expansion in two patterns adjacent to each other so that they become greater than their initial patterns as shown in FIG.
9
(
b
). In
FIG. 9
, the rectangular shapes indicated by broken lines each represent a mask pattern and tile hatched portions each represent a pattern which has been transferred onto a wafer. The self-light proximity effect illustrated:in FIG.
9
(
a
) is caused by the diffraction of light and affects the vertices and their neighborhoods of a rectangular shape, resulting in a shrunk pattern. The mutual-light proximity effect illustrated in FIG.
9
(
b
) is caused mainly by the interference of light and the close parts of two patterns become further closer to each other under the influence of light interference after transferring.
If such differences in pattern are caused, there often arise the problems of poor device performance and geometric defects such as erroneous contact between shapes, because of mask pattern distortion after transferring.
As an attempt to counter such geometric pattern defects, correction techniques by use of assist shapes have been extensively studied. These techniques are generally called “Optical Proximity Correction” (hereinafter referred to as “OPC”). OPC is sometimes used for explaining techniques for compensating for pattern degradation in non-optical pattern transferring such as etching.
One known OPC technique is disclosed in Japanese Patent Publication (KOKAI) GazetteNo. 5-80486 (1993). A conventional OPC technique is typically carried out in the following way. Based on degrees of pattern distortion observed in tests of transferring a design pattern onto a wafer or based on degrees of pattern distortion observed in simulations in which various luminous intensities are applied to the design pattern, corrected shapes are created by adding a plurality of modifying shapes to an original design pattern or by deleting parts from an original design pattern. Then, transferring tests are conducted with the corrected shapes. Modifying shape data which provides a transferred pattern most closest to the original design pattern is searched for in the above transferring tests. With the obtained data, actual corrections are made by altering or partially deleting the original design pattern, by use of a CAD program.
FIG.
10
(
a
) shows an example of pattern correction performed on the isolated shape shown in FIG.
9
(
a
), using a CAD program, whereas FIG.
10
(
b
) show; an example of pattern correction performed on the close shapes shown in FIG.
9
(
b
), using a CAD program. The example shown in FIG.
10
(
a
) is an example in which modifying graphic data (hatched portion) is added. The example shown in FIG.
10
(
b
) is an example in which parts (indicated by broken lines) are deleted from a design pattern to produce a corrected pattern.
In an electron beam exposure system, drawing is carried out with base shapes (rectangles) in view of its characteristics. Therefore, when converting a design pattern which has undergone optical proximity correction into electron beam exposure data (hereinafter referred to as “EB data”) to be used in exposure mask preparation, it is necessary to divide polygons which constitute the design pattern into a plurality of base shapes. A design pattern is represented by a plurality of polygons, and as the order of each polygon is higher (i.e., the number of vertices in each polygon increases), the number of base shapes into which the design pattern is divided increases.
One example of methods for dividing a design pattern into base shapes is disclosed in Japanese Patent Publication (KOKAI) Gazette No. 8-306608 (1996). FIG.
11
(
a
) shows an isolated shape. FIG.
11
(
b
) shows one example of corrected patterns obtained by correcting the shape shown in FIG.
11
(
a
) with a conventional technique and then dividing the corrected shape into base shapes. The broken lines each represent a parting line. In this example, the number of base shapes has increased from one to seven.
FIG.
11
(
c
) represents two rectangular shapes close to each other. FIG.
11
(
d
) shows one example of corrected patterns obtained by correcting the shape shown in FIG.
11
(
c
) with a conventional technique and then dividing the corrected shape into base shapes. The broken line search represent a parting line. In this example, the number of base shapes has increased from two to four.
The above-described conventional processes reveal the following disadvantage. Specifically, for transferring a mask pattern onto a silicon wafer, an original design pattern is not simply used as a transfer mask pattern but a transfer mask pattern is newly produced taking into account the optical proximity effects which may occur during mask pattern transferring. However, if such a technique is applied to all the geometric shapes contained in a mask pattern as is done conventionally, a tremendous number of steps and long processing time become necessary.
Recent semiconductor integrated circuit devices typically represented by ASIC (application specific integrated circuits) include many irregular design patterns and if the above technique is applied to all the geometric shapes for such an integrated circuit, an immense number of corrected patterns will be involved. Therefore, the above technique cannot be suitably applied to actual correction.
In addition, a mask pattern is generally represented by polygons and if modifying shapes are added to or partial deletion is performed with respect to a design pattern, new vertices appear in a polygon, so that the mask pattern after correction is of higher order and has more complexity than the initial design pattern.
When converting the corrected design pattern into EB data by

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