Electrolysis: processes – compositions used therein – and methods – Electrolytic erosion of a workpiece for shape or surface... – Eroding workpiece of nonuniform internal electrical...
Patent
1997-09-22
1999-10-12
Gorgos, Kathryn
Electrolysis: processes, compositions used therein, and methods
Electrolytic erosion of a workpiece for shape or surface...
Eroding workpiece of nonuniform internal electrical...
205665, 205666, 205667, C25F 300
Patent
active
059650052
ABSTRACT:
The present invention provides a method for forming porous silicon, which includes the steps of: a) providing a silicon substrate; b) growing a GaAs layer on the silicon substrate; c) defining a pattern for the GaAs layer by a photolithography process and etching the patterned GaAs layer to obtain a GaAs mask; and d) forming a porous silicon layer by anodic-oxidation-etching the silicon substrate uncovered by the GaAs mask. By this method, etching under the GaAs layer on the silicon substrate can be executed very well to form the porous silicon. And the patterned GaAs layer is etched by a process in step c), which is selected from a wet etching and a dry etching process with a photoresist as a mask. In addition, the anodic-oxidation-etching process in step d) is an electrolytic process executed in HF acidic solution which is a mixture of 30 vol. % HF and 70 vol. % H.sub.2 O, in which the HF concentration is 49 wt. %.
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Lee Ming-Kwei
Wang Yu-Hsiung
Brown Michael J.
Chiatalas John L.
Gorgos Kathryn
National Science Council
Parsons Thomas H
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