Mask for forming features on a semiconductor substrate and a met

Details Mask for forming features on a semiconductor substrate and a met Mask for forming features on a semiconductor substrate and a met

1996-05-21

1997-10-14

Breneman, R. Bruce

Etching a substrate: processes

Forming or treating an article whose final configuration has...

216 42, 216 49, 216 51, 216 67, 1566431, 15665911, 427199, 427201, B05D 500

Patent

active

056768532

ABSTRACT:
A mask and a method for forming a mask on a surface of an underlying layer of material used in semiconductor device manufacturing. The mask is a mixture of mask particles and spacer particles. The spacer particles space the mask particles apart from one another to control the distance and the uniformity of the distribution of mask particles across the surface of the underlying layer. The spacer particles and mask particles have different physical properties that allow the spacer particles to be selectively removed from the surface of the underlying layer. The spacer particles are preferably removed from the surface of the underlying layer by selectively etching the spacer particles from the underlying layer. After the spacer particles are removed from the underlying layer, the mask particles remain on the underlying layer to provide spaced apart mask elements on the surface of the underlying layer.

REFERENCES:
patent: 4407695 (1983-10-01), Deckman et al.
patent: 5194297 (1993-03-01), Scheer et al.
patent: 5510156 (1996-04-01), Zhao
patent: 5548181 (1996-08-01), Jones

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