Mask for electron beam exposure and method of manufacturing...

Radiation imagery chemistry: process – composition – or product th – Radiation modifying product or process of making – Radiation mask

Reexamination Certificate

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C430S296000

Reexamination Certificate

active

06352802

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates generally to a mask for electron beam exposure used in an exposure process in which an electron beam (EB) is irradiated onto a semiconductor wafer via the mask for electron beam exposure to pattern a resist film on the semiconductor wafer, and to a method of manufacturing a semiconductor device using such mask. More particularly, the present invention relates to a mask for electron beam exposure used in an exposure process which is performed by using an EB projection lithography system, and to a method of manufacturing a semiconductor device using such mask.
BACKGROUND OF THE INVENTION
Conventionally, in a manufacturing process of a semiconductor device, an exposure process for exposing a resist film on a semiconductor wafer, here an electron beam resist film, with an electron beam was performed by using a cell projection EB system to pattern the resist film. In this system, an electron beam is irradiated onto an area of, for example, 125 micrometers(&mgr;m)×125 micrometers of a mask for electron beam exposure. The mask for electron beam exposure has mask patterns comprising trenches or openings for passing an electron beam therethrough. An image of the mask patterns is reduced, for example, to {fraction (1/25)} and projected onto the semiconductor wafer by the electron beam passing through the mask for electron beam exposure. Therefore, by one shot of the exposure, an area of 5 micrometers×5 micrometers on the semiconductor wafer, that is, an area of 5 micrometers×5 micrometers of a resist film formed on the semiconductor wafer, is exposed by an electron beam having patterns corresponding to the mask patterns.
In order to fabricate one semiconductor device or one semiconductor chip, it is necessary to expose a resist film on a semiconductor wafer with patterns corresponding to one whole semiconductor chip, that is, patterns for a chip or chip patterns, and to pattern the resist film by the exposed chip patterns. In the cell projection EB system, a mask for electron beam exposure has a mask pattern area corresponding to a pattern area which is a part of an area of the patterns for one chip and which is repeated to obtain the patterns for one chip. Exposure steps by using such mask for electron beam exposure are repeated, while, for example, shifting the location of a semiconductor wafer with respect to the mask. Thereby, the resist film on the semiconductor wafer is exposed by the patterns for a chip, and is then developed to obtain a patterned resist film.
However, in the above-mentioned cell projection EB system, the area on the semiconductor wafer exposed at a time is not sufficiently large. Therefore, the number of electron beam shots required to expose a resist film on a semiconductor wafer by predetermined patterns for a chip becomes relatively large. As result thereof, the time required for an exposure process becomes long, and it is impossible to raise throughput of semiconductor manufacturing sufficiently high.
In order to realize a remarkable improvement in the throughput of semiconductor device manufacturing, there began to be proposed an EB projection lithography system, approximately from the year 1990. In this system, an electron beam having a large cross sectional area is used, and it becomes possible to irradiate the electron beam onto a relatively large area, for example, an area of 1 mm×1 mm, on a mask for electron beam exposure, at a time. The mask for electron beam exposure has mask patterns comprising trenches or openings for passing an electron beam therethrough. Mask pattern image is reduced to, for example, ¼ and projected onto a semiconductor wafer by the electron beam passing through the mask for electron beam exposure. Therefore, by one shot of exposure, it is possible to expose a large area on a semiconductor wafer, here an area of 250 micrometers×250 micrometers, by an electron beam having patterns corresponding to the mask patterns.
The inventor of the present invention studied and considered on a mask for electron beam exposure used in such EB projection lithography. As a result thereof, it was found that the mask for electron beam exposure can be fabricated as follows. A resist film on a semiconductor wafer must be exposed and patterned such that circuit patterns of a whole area of each chip, that is, patterns for a chip, are repeatedly exposed and formed. Patterns for one chip are divided into a plurality of small pattern areas or subfields, and patterns corresponding to each of the subfields are formed on one mask for electron beam exposure.
FIG. 6A
is a plan view schematically showing a manner of dividing patterns for one chip into a plurality of subfields to fabricate a mask for electron beam exposure.
FIG. 6B
is a plan view showing a schematic structure of a mask for electron beam exposure considered by the inventor.
Patterns for one chip
115
are simply divided into a plurality of subfields per a maximum exposure area E
2
. The maximum exposure area is an area on a semiconductor wafer which is substantially exposed when it is assumed that the whole of an electron beam irradiated onto a mask for electron beam exposure passes thorough the mask for electron beam exposure and is exposed onto a semiconductor wafer by an exposure of one shot. In the above-mentioned example, a square area of 250 micrometers×250 micrometers on the semiconductor wafer corresponds to the maximum exposure area E
2
. In the example of
FIG. 6A
, a chip pattern area
115
is divided into 9 (nine) subfields S
1
through S
9
, by division lines
116
provided every 250 micrometers both in a vertical direction and in a horizontal direction. Then, as shown in
FIG. 6B
, mask patterns which correspond to patterns obtained by enlarging the patterns of the subfields S
1
through S
9
four times respectively are formed in mask pattern areas M
1
-M
9
between grillage areas
112
of a mask for electron beam exposure
105
. In this case, the mask for electron beam exposure
105
is a 4×mask.
An electron beam is irradiated on each of the mask pattern areas M
1
through M
9
of the mask for electron beam exposure
105
shown in
FIG. 6B
, and predetermined portions of a resist film on the semiconductor wafer are sequentially exposed by the electron beam passed through the mask for electron beam exposure
105
. In this case, the mask
105
and the semiconductor wafer are both intermittently shifted-relative to the electron beam. Thereby, the resist film formed on the semiconductor wafer can be exposed by the chip pattern
115
shown in FIG.
6
A.
However, it is not always true that dimensions in a vertical direction and in a horizontal direction of the chip pattern
115
are respectively multiples of dimensions in a vertical direction and in a horizontal direction of the above-mentioned maximum exposure area, here both 250 micrometers. Therefore, the size and shape of all the subfields are not always constant. That is, the size of some of the subfields may become much smaller than that of the other subfields. Also, the shape of some of the subfields may become different from that of the other subfields. For example, in the: example of
FIG. 6A
, the size of each of the subfields S
3
, S
6
, S
7
, S
8
and S
9
located along the right side end and the upper side end of the chip pattern
115
becomes much smaller than the size of each of the other subfields S
1
, S
2
, S
4
and S
5
, that is, 250 micrometers×250 micrometers. The dimensions of the mask pattern areas M
1
-M
9
in a vertical direction and in a horizontal direction are four times the dimensions of the subfields F
1
-F
9
in a vertical direction and in a horizontal direction, respectively. Therefore, as shown in
FIG. 6B
, among the mask pattern areas M
1
through M
9
of the mask for electron beam exposure
105
, the size of each of the mask pattern areas M
3
, M
6
, M
7
, M
8
and M
9
formed along the right side end and upper side end becomes much smaller than that of each of the other mask pattern areas M
1

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