Active solid-state devices (e.g. – transistors – solid-state diode – Alignment marks
Reexamination Certificate
2006-04-18
2006-04-18
Ho, Tu-Tu (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Alignment marks
C257S283000, C257SE23179
Reexamination Certificate
active
07030506
ABSTRACT:
A method and mask to improve measurement of alignment marks is disclosed. An exemplary embodiment of the invention includes a resist mask with a patterned alignment mark comprising an assemblage of features whose spacing is smaller than the wavelength of light used to measure the alignment. In a preferred embodiment, an alignment mark patterning process alters the appearance of the alignment mark and renders an enhanced contrast with the substrate background.
REFERENCES:
patent: 5141322 (1992-08-01), Miyatake
patent: 6130750 (2000-10-01), Ausschnitt et al.
patent: 6359735 (2002-03-01), Gombert et al.
patent: 6417922 (2002-07-01), Dirksen et al.
patent: 6628392 (2003-09-01), Kuroda et al.
patent: 6778275 (2004-08-01), Bowes
patent: 2002/0080364 (2002-06-01), Monshouwer et al.
patent: 2005/0041256 (2005-02-01), Kreuzer
patent: 0 727 715 (1996-08-01), None
patent: 1 162 507 (2001-12-01), None
Gutmann Alois
Williams Gary
Zaidi Syed Shoaib Hasan
Edell Shapiro & Finnan LLC
Ho Tu-Tu
Infineon - Technologies AG
LandOfFree
Mask and method for using the mask in lithographic processing does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Mask and method for using the mask in lithographic processing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Mask and method for using the mask in lithographic processing will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3586620