Marker for alignment of non-transparent gate layer, method...

Details Marker for alignment of non-transparent gate layer, method... Marker for alignment of non-transparent gate layer, method...

2007-09-18

2007-09-18

Wilczewski, M. (Department: 2822)

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Having substrate registration feature

C438S975000, C250S559300

Reexamination Certificate

active

10879707

ABSTRACT:
A method for manufacturing a marker structure including line elements and trench elements arranged in a repetitive order includes filling the trench elements with silicon dioxide and leveling the marker structure. A sacrificial oxide layer is grown on the semiconductor surface, and a first subset of the line elements is exposed to an ion implantation beam including a dopant species to dope and change an etching rate of the first subset. The substrate is annealed to activate the dopant species, and the semiconductor surface is etched to remove the sacrificial oxide layer and to level the first subset to a first level and to create a topology such that the first subset has a first level differing from a second level of a surface portion of the marker structure different from the first subset.

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