Mapping circuit of a CRT display device

Details Mapping circuit of a CRT display device Mapping circuit of a CRT display device

1989-06-14

1990-11-27

Shaw, Dale M.

Boots, shoes, and leggings

G06F 1572

Patent

active

049741772

ABSTRACT:
In a mapping circuit of a CRT display device in accordance with the present invention, vertex calculating means (2 and 3) evaluates corresponding relations between vertexes of a three-dimensional polygon and vertexes of a two-dimensional polygon and inclination calculating means (4 and 5) calculates inclination of the line segments connecting the respective vertexes of the three-dimensional polygon and inclinations of the line segments connecting the vertexes of the two-dimensional polygon. Vertexes interpolating means (6 and 7) performs interpolation between the respective vertexes of the three-dimensional polygon and also performs interpolation between the respective vertexes of the two-dimensional polygon. Then, using the interpolated points as start points or end points, start and end points interpolating means (9, 10, 11 and 12) performs interpolation between the respective start points and end points. A picture pattern on the coordinates of each interpolated point is read out by a pixel array memory control portion (14) and using the coordinates of each interpolated point as an address, the picture pattern is written in a frame memory (17), so that the picture pattern is displayed on a CRT display (18). Consequently, a host computer does not need to perform coordinate transformation in pixel units.

REFERENCES:
patent: 4181953 (1980-01-01), Osofsky
patent: 4645459 (1987-02-01), Graf et al.
patent: 4697178 (1987-09-01), Heckel
patent: 4725831 (1988-02-01), Coleman

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