Manufacturing process for semiconductor wafer comprising...

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S692000

Reexamination Certificate

active

06656818

ABSTRACT:

TECHNICAL FIELD
This invention relates to a manufacturing process for a semiconductor wafer (hereinafter also referred to as a “wafer”) including surface grinding, followed by planarization or polishing.
BACKGROUND OF THE INVENTION
In a manufacturing process for a semiconductor wafer of this kind, a semiconductor wafer has been surface-ground according to a process described below, shown in FIG.
10
(
a
)(
b
)(
c
) and thereafter, a single side surface or double side surfaces thereof are processed for planarization according to a CMP (Chemical Mechanical Polishing) method, or a PACE (Plasma Assisted Chemical Etching) method (for example, see JP 2565617) for purposes of removal of a work damage layer caused by the grinding, and improvements on flatness and smoothness.
(1) First, a chuck table
12
for fixing a semiconductor wafer W thereon rotates on its rotation axis
12
a
with a prescribed slight tilt angle &thgr; to the rotation axis
14
a
of a rotary shaft
14
of a cup shaped grinding wheel (hereinafter also simply referred to as a “grinding wheel”)
16
. Then, the grinding wheel
16
in rotation moves down and is into contact with the chuck table
12
to grind the chuck table
12
(FIG.
10
(
a
)), with the result that a grinding finished surface of the chuck table
12
assumes an outwardly extending circular cone surface having a vertical angle (180−2&thgr;) with a vertex thereof being the rotation axis of the chuck table
12
.
(2) Then, a semiconductor wafer W is fixed on the surface ground chuck table
12
and the chuck table
12
is forced to rotate (FIG.
10
(
b
)).
(3) Furthermore, the grinding wheel
16
moves down to a surface of the semiconductor wafer W and is into contact with the
40
wafer W, thereby the wafer W being surface-ground (FIG.
10
(
c
)).
In recent years, a trend that surface grinding, as a processing method to obtain higher flatness, is introduced into a wafer processing step has been increasingly enhanced due to the demand for higher flatness of a semiconductor wafer. In the surface-grinding step of the semiconductor wafer, as shown in FIG.
10
(
a
) to (
c
), the grinding is performed such that the cup shaped grinding wheel
16
cuts into the wafer W at an outer peripheral edge thereof and moves away from the wafer at a central portion, wherein the grinding proceeds while the grinding wheel
16
keeps in contact with the wafer over a length corresponding to a radius of the wafer W.
As schematically shown in
FIG. 11
, a removal by grinding is low due to a surface slipping phenomenon from elasticity of the grinding wheel
16
at a start position for cutting in of the grinding wheel
16
in contacting the wafer as a work and as a result, a grinding finished surface comes to have a slight rise at the start position, while at terminating position for cutting, the grinding finished surface face comes to have a recess because a grinding removal increases due to rapid reduction in resistance to cutting. These rise and recess characteristic of a,finished surface obtained by surface-grinding have been obstacles against manufacturing a wafer having higher flatness.
For example, in the case where surface-grinding is effected using a resinoid bonded cup shaped grinding wheel including diamond abrasive powder and furthermore, the grinding is performed toward the center of the-wafer from an outer peripheral edge thereof, as was in the prior art, such that the grinding wheel cuts into the wafer at the outer peripheral edge thereof and moves away from the wafer at the center thereof, there occur a recess in the vicinity of the center of the surface-ground wafer, of the order of 2 to 10 mm in diameter and of the order of 0.2 to 0.5 &mgr;m in depth, and a rise of the same order as the recess in size in the outer peripheral edge portion thereof.
The surface-ground wafer proceeds into a planarization or polishing step to come next, where a work damage layer on the surface-ground surface of the wafer caused by the surface-grinding is removed and the above described rise and recess portions are corrected to achieve increased flatness and enhanced smoothness.
In a polishing method using a polishing cloth, that is a CMP method, which is currently a main stream as a planarization or polishing method, the polishing cloth is made of a soft material, therefore, there is a tendency that a polishing surface of the cloth follows geometric features of a to-be-polished surface of a work and as a result, a polishing action is exercised to even a recess portion in the vicinity of the center of the wafer, therefore, correction of the recess portion is hard to be effected. In contrast to this, a polishing action is easy to act at a rise portion occurring locally in the outer peripheral edge portion, therefore, a rise in the outer peripheral edge portion is corrected.
On the other hand, in a PACE method newly developed for planarization, stock can be removed from a to-be-ground surface locally to a prescribed depth by an etching action of a plasma; therefore, a surface material is removed from part other than the recess portion, whereby flatness all over the surface can be improved.
The invention has been made in light of the above described prior art problem and it is accordingly an object of the invention to provide a manufacturing process for a semiconductor wafer capable of manufacturing the semiconductor wafer having higher flatness efficiently from a wafer work having passed through a surface grinding step by suppressing the above-noted reductions in flatness occurring in the vicinity of the center of the wafer work and in the outer peripheral edge portion thereof as much as possible and further, enabling correction of the reductions in flatness for planarization in a planarization or polishing step with ease.
DISCLOSURE OF THE INVENTION
In order to solve the above problem, a first aspect of the invention is directed to a manufacturing process for a semiconductor wafer wherein when the semiconductor wafer is surface ground using a cup shaped grinding wheel, the semiconductor wafer is ground toward the center thereof such that the cup shaped grinding wheel cuts into the semiconductor wafer at an outer peripheral edge thereof and moves away from the semiconductor wafer at a central portion thereof and the ground semiconductor wafer is planarized according to a PACE method.
That is, since in a surface grinding operation, the grinding wheel cuts into the semiconductor wafer at the outer peripheral edge portion and moves away from the semiconductor wafer at the central portion, there occur a rise in the outer peripheral edge portion of a finish surface of the wafer after the grinding and a recess in the central portion thereof. However, by use of the PACE method, there is corrected the recess in the central portion of the wafer, which in the prior art was difficult to be corrected by means of a method for polishing the wafer using a CMP method after the surface grinding, thereby enabling manufacture of a polished wafer having higher flatness.
A surface of the semiconductor wafer which has been planarized using the PACE method has very fine rises and recesses thereon remaining after the planarization; therefore, it is desirable to improve flatness and smoothness of the surface by further polishing the surface using a CMP method.
A method to force the grinding wheel to cut into the semiconductor wafer at the outer peripheral edge thereof can be performed such that rotation directions of the semiconductor wafer and the grinding wheel can be either of the same sense as each other or of the opposite senses from each other.
A chuck table, as described above, has a finished surface of a slightly inclined circular cone whose vertex is on the rotation axis of the chuck table. The wafer is held on the chuck table and surface grinding is performed so as to act over a radius of the wafer surface while holding a state of the wafer in which a central portion of a to-be-ground surface of the wafer slightly protrudes from a plane including a grinding surface of the grinding wheel; theref

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Manufacturing process for semiconductor wafer comprising... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Manufacturing process for semiconductor wafer comprising..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacturing process for semiconductor wafer comprising... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3128180

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.