Manufacturing process for reducing feature dimensions in a semic

Details Manufacturing process for reducing feature dimensions in a semic Manufacturing process for reducing feature dimensions in a semic

1998-04-13

2000-08-01

Baxter, Janet

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

438947, 438950, 438739, 438742, 438744, H01L 2100

Patent

active

060966599

ABSTRACT:
A process for reducing dimensions of circuit elements in a semiconductor device. The process reduces feature sizes by using an intermediate etchable mask layer between a photo-resistive mask and a layer to be etched. The etchable mask layer below the photo-resistive mask is etched and portions remain which undercut the pattern on the photo-resistive mask. After removing the photo-resistive mask, the remaining mask portions are then used to mask the layer to be etched. By undercutting the photo-resistive mask, the mask portions form a pattern having features with widths that are less than widths of features in the photo-resistive mask. The layer to be etched can then be etched to provide circuit elements with reduced dimensions.

REFERENCES:
patent: 4639288 (1987-01-01), Price et al.

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