Manufacturing process for embedded semiconductor device

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE23173

Reexamination Certificate

active

07923299

ABSTRACT:
A manufacturing process for an embedded semiconductor device is provided. In the manufacturing process, at least one insulation layer and a substrate are stacked to each other, and a third metal layer is laminated on the insulation layer to embed a semiconductor device in the insulation layer. The substrate has a base, a first circuit layer, a second circuit layer, and at least a first conductive structure passing through the base and electrically connected to the first circuit layer and the second circuit layer. In addition, the third metal layer is patterned to form a third circuit layer having a plurality of third pads.

REFERENCES:
patent: 2001/0027605 (2001-10-01), Nabemoto et al.
patent: 2007/0145577 (2007-06-01), Zeng et al.
patent: 2009/0188703 (2009-07-01), Ito et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Manufacturing process for embedded semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Manufacturing process for embedded semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacturing process for embedded semiconductor device will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2633710

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.