Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Metallic housing or support
Reexamination Certificate
2011-04-12
2011-04-12
Blum, David S (Department: 2813)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Metallic housing or support
C257SE23173
Reexamination Certificate
active
07923299
ABSTRACT:
A manufacturing process for an embedded semiconductor device is provided. In the manufacturing process, at least one insulation layer and a substrate are stacked to each other, and a third metal layer is laminated on the insulation layer to embed a semiconductor device in the insulation layer. The substrate has a base, a first circuit layer, a second circuit layer, and at least a first conductive structure passing through the base and electrically connected to the first circuit layer and the second circuit layer. In addition, the third metal layer is patterned to form a third circuit layer having a plurality of third pads.
REFERENCES:
patent: 2001/0027605 (2001-10-01), Nabemoto et al.
patent: 2007/0145577 (2007-06-01), Zeng et al.
patent: 2009/0188703 (2009-07-01), Ito et al.
Advanced Semiconductor Engineering Inc.
Blum David S
J.C. Patents
LandOfFree
Manufacturing process for embedded semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Manufacturing process for embedded semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Manufacturing process for embedded semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2633710