Manufacturing process for a monolithic integrated semiconductor

Details Manufacturing process for a monolithic integrated semiconductor Manufacturing process for a monolithic integrated semiconductor

1988-09-07

1989-12-26

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 30, 437 26, 437 51, 437 59, 437151, H01L 2120

Patent

active

048898228

ABSTRACT:
The invention concerns a process for manufacturing a monolithic integrated semiconductor device comprising an integrated control circuit and high-voltage power components. It solves the problem of undesired phantom layers created by out diffusion of the type-P dopant present in the insulation region of the substrate. Between a first epitaxial layer and a third epitaxial layer of the device, a second epitaxial layer is grown of predetermined thickness, and a first region for the insulation of the integrated control citcuit is formed in the first epitaxial layer and at least a second region for the buried layer is formed in the second eiptaxial layer.

REFERENCES:
patent: 3663872 (1972-05-01), Yanagawa
patent: 4161417 (1979-07-01), Yim et al.
patent: 4213806 (1980-07-01), Tsang
patent: 4667393 (1987-05-01), Ferla et al.
patent: 4721684 (1988-01-01), Musumeci
patent: 4780430 (1988-10-01), Musumeci et al.

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