Manufacturing method of semiconductor integrated circuit

Details Manufacturing method of semiconductor integrated circuit Manufacturing method of semiconductor integrated circuit

1997-10-17

1999-04-27

Dang, Trung

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Grooved and refilled with deposited dielectric material

438424, 438430, 438429, 148DIG50, H01L 2176

Patent

active

058973605

ABSTRACT:
A manufacturing method of a semiconductor integrated circuit utilizing a trench isolated region to control the occurrence of parasitic transistors without narrowing the element region by forming first and second openings 4A, 4B on a silicon substrate for the purpose of element isolation, forming an amorphous silicon film thereon, then leaving the amorphous silicon film behind only a surface of a side wall of the opening by performing anisotropy etching. After oxidizing the surface of the amorphous silicon film and inside base, the opening is filled with a silicon oxide film.

REFERENCES:
patent: 4842675 (1989-06-01), Chapman
patent: 5496765 (1996-03-01), Schwalke

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