Manufacturing method of semiconductor device having trench...

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S424000, C438S443000, C438S444000, C438S692000, C438S697000

Reexamination Certificate

active

10096867

ABSTRACT:
A semiconductor substrate including a first region, a second region larger than the first region and an isolation region is provided. A mask layer is selectively formed on the first and second regions. A trench is formed on the isolation region. A first isolation material is deposited on the entire surface so that the trench is filled with the first material and the first material covers the first and second regions. The first material is subjected to a chemical mechanical polish so that the mask layer formed on the first region is exposed while the mask layer formed on the second region is still covered by the first material. Then, a second insulation material is deposited on the exposed mask layer and the first material. Finally, the second material is subjected to the chemical mechanical polish so that mask layer formed on the first and second regions is substantially exposed.

REFERENCES:
patent: 5728621 (1998-03-01), Zheng et al.
patent: 6001696 (1999-12-01), Kim et al.
patent: 6057210 (2000-05-01), Yang et al.
patent: 6103592 (2000-08-01), Levy et al.
patent: 6214699 (2001-04-01), Joyner
patent: 6265743 (2001-07-01), Sakai et al.
patent: 6391781 (2002-05-01), Ozawa et al.
patent: 6417073 (2002-07-01), Watanabe
patent: 11-340317 (1998-10-01), None
patent: 2001-024055 (2001-01-01), None
Notice of Reasons (Dated Jan. 7, 2003).

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