Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2003-01-16
2004-03-16
Zarneke, David A. (Department: 2827)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S107000, C438S108000, C438S113000, C438S121000, C438S124000, C438S127000, C438S976000
Reexamination Certificate
active
06706558
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention relates to a manufacturing method of a semiconductor device called an area array package, such as BGA (Ball Grid Array) and CSP (Chip Size Package), having connection terminals arranged on a grid. The connection terminals of the semiconductor device are connected to a circuit board, such as a motherboard, containing glass fibers.
The area array package is one of the semiconductor device in which a semiconductor pellet having an integrated circuit formed thereon is encapsulated in a resin member.
The manufacturing method of the semiconductor device is disclosed by, for example, Japanese Laid-Open Patent Publication Nos. 2000-252388, 2000-252389 and 2000-252390. According to these publications, the semiconductor pellet is formed by the following process. First, a metal foil is placed in a mold for encapsulating the semiconductor pellet in a resin member. Electrodes of the semiconductor pellet are electrically connected to predetermined positions of the metal foil by means of bonding wires. Then, the resin member is pressurized and injected into the mold, so that the pellet, the metal foil and,the wires are encapsulated in the resin member.
According the above described Japanese Laid-Open Patent Publication Nos. 2000-252388 and 2000-252390, when the resin member is injected in the mold, the metal foil deforms along the contour of the bottom of the mold, so that concaves are formed in the metal foil. According to the above described Japanese Laid-Open Patent Publication No. 2000-252389, when the resin member is injected in the mold, the metal foil deforms along the contour of the bottom of the mold, so that projections are formed in the metal foil. After the resin member is hardened, the metal foil on the bottom of the resin member is cut into plurality of areas by means of high pressure jet or laser beam, so that respective concaves or projections of the metal foil are electrically separated from each other. According to the above described Japanese Laid-Open Patent Publication Nos. 2000-252388 and 2000-252390, solder balls are bonded to the concaves of the separated areas of the metal foil and form connection terminals. According to the above described Japanese Laid-Open Patent Publication No. 2000-252389, the projections of the separated areas of the metal foil are used as the connection terminals.
In the above described prior arts, the separated areas of the metal foil are in contact with the resin member having a larger thickness compared with the metal foil. Therefore, when the resin member thermally expands and shrinks, the metal foil also expands and shrinks along with the resin member. Thus, the metal foil expands and shrinks according to the thermal expansion coefficient of the resin member.
In contrast, the circuit board to which the connection terminals of the semiconductor device are connected is made of epoxy-based resin mixed with glass fibers. The circuit board thermally expands and shrinks according to its thermal. expansion coefficient that differs from that of the resin member of the semiconductor device.
As a result, the difference in thermal expansion and shrinkage between the metal foil and the circuit board causes a stress between the metal foil and the circuit board. The stress causes a strain in weak portions of the metal foil and the circuit board.
Therefore, in the conventional semiconductor device disclosed by the above described Japanese Laid-Open Patent Publication Nos. 2000-252388 and 2000-252390, the stress is applied to the connection terminals (i.e., the solder balls) between the metal foil and the circuit board, and therefore the connection terminals may be detached from the metal foil or the circuit board. In the semiconductor device disclosed by the above described Japanese Laid-Open Patent Publication No. 2000-252389, the stress is applied between the connection terminals and the mounting surface of the circuit board, and therefore the connection terminals may be detached from the mounting surface of the circuit board.
Moreover, in the conventional manufacturing method of the semiconductor device, the thin metal foil deforms along the contour of the mold during the injection process of the resin member after the wires are connected to the metal foils. Therefore, when the metal foil deforms in the mold, the wires connected to the metal foils may contact each other.
Further, in the conventional manufacturing method of the semiconductor device, during the cutting process of the metal foil, the metal foil may be detached from the resin member, and the wires may be cut or disconnected from the metal foil. In addition, the cutting process of the metal foil requires a long time to operate.
Furthermore, in the manufacturing method disclosed by the above described Japanese Laid-Open Patent Publication Nos. 2000-252388 and 2000-252390, an oxide film may be formed on the metal foil because of the heat applied when the wires are bonded to the metal foil and when the resin member is injected in the mold. Such an oxide foil may cause a poor connection of the solder ball.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a manufacturing method of a semiconductor device capable of solving the above described problems.
According to the invention, there is provided a manufacturing method of a semiconductor device. The semiconductor device comprises a semiconductor pellet having an integrated circuit and a plurality of electrodes formed thereon, a resin portion encapsulating the semiconductor pellet, and a plurality of connection terminals to be mounted to a circuit board. The connection terminals are electrically connected to the electrodes. The manufacturing method comprises the step of forming a plurality of electrical conductive posts on a side of a plate member. Each post has first and second ends. The second end contacts the plate member. The manufacturing method further comprises the step of forming a buffer layer on the side of the plate member so that the first ends of the posts are protruded from the buffer layer. The buffer layer supports the posts and is able to thermally expand and shrink according to the thermal expansion and shrinkage of the circuit board. The manufacturing method further comprises the steps of mounting the semiconductor pellet on a predetermined position on the first ends of the posts, and connecting the electrodes of the semiconductor pellet to the first ends of the posts corresponding to the electrodes by means of wires, forming the resin portion on the buffer layer so that the resin portion encapsulates the posts, the wires and the semiconductor pellet, removing the plate member, and forming a plurality of connection terminals on the second ends of the posts.
According to the above method, the buffer layer thermally expands and shrinks according to the thermal expansion and shrinkage of the circuit board, and therefore it is possible to prevent the detachment of the solder balls from the second ends of the posts or mounting surfaces of the circuit board.
Further, the posts do not deform by the pressure when the resin portion is formed, and therefore it is possible to prevent the contact between the wires connected to the posts because of the deformation of the posts.
Moreover, the posts can be electrically separated from each other by removing the plate member, and therefore it is not necessary to provide a cutting process for electrically separating the posts. As a result, the chippings are not generated, and the total manufacturing time can be reduced.
Additionally, there is little chance for an oxide layer to be formed on the bottom of the posts, and therefore the detachment of the wires from the posts can be prevented.
REFERENCES:
patent: 6001671 (1999-12-01), Fjelstad
patent: 6215179 (2001-04-01), Ohgiyama
patent: 6528893 (2003-03-01), Jung et al.
patent: 6566168 (2003-05-01), Gang
patent: 6586677 (2003-07-01), Glenn
patent: 2000-252388 (2000-09-01), None
patent: 2000-252389 (2000-09-01), None
patent: 2000-252390 (2000-09-01), None
Oki Electric Industry Co. Ltd.
Volentine & Francos, PLLC
Zarneke David A.
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