Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2006-05-04
2009-06-30
Picardat, Kevin M (Department: 2822)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S218000, C438S219000, C438S221000, C438S424000, C438S426000, C438S427000, C438S435000, C438S444000, C438S445000, C438S405000
Reexamination Certificate
active
07553741
ABSTRACT:
Even if the insulated isolation structure which makes element isolation using partial and full isolation combined use technology is manufactured, the manufacturing method of a semiconductor device which can manufacture the semiconductor device with which characteristics good as a semiconductor element formed in the SOI layer where insulated isolation was made are obtained is obtained.Etching to an inner wall oxide film and an SOI layer is performed by using as a mask the resist and trench mask which were patterned, and the trench for full isolation which penetrates an SOI layer and reaches an embedded insulating layer is formed. Although a part of CVD oxide films with which the resist is not formed in the upper part are removed at this time, since a silicon nitride film is protected by the CVD oxide film, the thickness of a silicon nitride film is kept constant. Then, after removing the resist and depositing an isolation oxide film on the whole surface, an isolation oxide film is flattened in good thickness precision in the height specified by the thickness of a silicon nitride film by performing CMP treatment which used the silicon nitride film as the polishing stopper.
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Au Bac H
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Picardat Kevin M
Renesas Technology Corp.
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