Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1998-09-02
2000-04-18
Bowers, Charles
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438744, 438757, 438791, 438954, 257640, H01L 2934
Patent
active
060515082
ABSTRACT:
The present invention intends to form multilayer interconnects without deteriorating the advantage of an organosiloxane film (an interlayer dielectric), i.e., the low dielectric constant. According to the present invention, an organosiloxane film, a silicon nitride film, an inorganic SOG film, and a photoresist pattern are formed on a first metal layer, in series. The inorganic SOG film is then etched with use of the photoresist pattern as a mask to transfer the photoresist pattern to the inorganic SOG film. The photoresist pattern is then removed by oxygen plasma treatment with use of the silicon nitride film as a protection mask for protecting the organosiloxane film. Subsequently thereto, the silicon nitride film and the organosiloxane film are etched with use of the inorganic SOG film to form a contact hole reaching the first metal layer. After removing the inorganic SOG film, a second metal layer is formed to contact with the first metal layer through the contact hole.
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Matsuno Tadashi
Miyajima Hideshi
Takase Tamao
Bowers Charles
Kabushiki Kaisha Toshiba
Schillinger Laura M
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