Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Bump leads
Reexamination Certificate
2008-12-16
2011-11-22
Smith, Matthew (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Bump leads
C257SE21299, C257SE23021, C257S751000, C257SE23068, C257SE21584, C438S613000, C438S643000, C438S612000, C438S112000
Reexamination Certificate
active
08063487
ABSTRACT:
A first conducting layer is formed on a side of a main surface on which an electrode terminal of a semiconductor device is provided in a semiconductor substrate. The first conducting layer is electrically connected to the electrode terminal of the semiconductor device. A mask layer that has an opening at a predetermined position is formed on the first conducting layer. A second conducting layer is formed inside the opening of the mask layer. The mask layer is removed. A relocation wiring that includes the first conducting layer and electrically draws out the electrode terminal is formed by performing anisotropic etching for the first conducting layer using the second conducting layer as a mask. Finally, a bump is formed on the relocation wiring by causing the second conducting layer to reflow.
REFERENCES:
patent: 5821626 (1998-10-01), Ouchi et al.
patent: 6211052 (2001-04-01), Farnworth
patent: 6511901 (2003-01-01), Lam et al.
patent: 7122458 (2006-10-01), Cheng et al.
patent: 2003/0157792 (2003-08-01), Tong et al.
patent: 2004/0201097 (2004-10-01), Ohsumi
patent: 2005/0176231 (2005-08-01), Shei et al.
patent: 2006/0090921 (2006-05-01), Sato et al.
patent: 2006/0189114 (2006-08-01), Seto et al.
patent: 2008/0217769 (2008-09-01), Yanase et al.
patent: 2006-237159 (2008-09-01), None
Ezawa Hirokazu
Iijima Tadashi
Migita Tatsuo
Togasaki Takashi
Baptiste Wilner Jean
Finnegan Henderson Farabow Garrett & Dunner L.L.P.
Kabushiki Kaisha Toshiba
Smith Matthew
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