Manufacturing method of integrated capacitor

Metal working – Electric condenser making

Reexamination Certificate

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Details

C029S025420, C029S025350, C029S852000, C029S846000, C438S238000

Reexamination Certificate

active

07096548

ABSTRACT:
Disclosed is a manufacturing method of an integrated capacitor including: forming a hole in a semiconductor substrate; depositing a dielectric film on an inner face of the formed hole; heat-treating the deposited dielectric film; depositing a silicon film on the dielectric film; embedding a resist film in the hole except an upper portion of the inner face of the hole on which the dielectric film and the silicon film are deposited; etching the silicon film on the heat-treated dielectric film with the embedded resist film as a mask; removing the resist film; removing the heat-treated dielectric film by etching with the silicon film remaining after the etching as a mask; and embedding an electrode material in the hole having the dielectric film remaining after the removal by etching, and the integrated capacitor.

REFERENCES:
patent: 4645564 (1987-02-01), Morie et al.
patent: 4922313 (1990-05-01), Tsuchiya
patent: 5432113 (1995-07-01), Tani
patent: 5843819 (1998-12-01), Kellner et al.
patent: 2003-234325 (2003-08-01), None
patent: 2003-282734 (2003-10-01), None
Lee, J. H. et al., “Mass Production Worthy HfO2—Al2O3Laminate Capacitor Technology Using Hf Liquid Precursor for Sub-100nm DRAMs”, IEEE, 4 pages, (2002).
Gutsche, M. et al., “Capacitance Enhancement Techniques for Sub-100nm Trench DRAMs”, IEEE, 4 pages, (2001).
Seidl, H. et al., “A Fully Integrated Al2O3Trench Capacitor DRAM for Sub-100nm Technology”, IEEE, 4 pages, (2002).

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