Semiconductor device manufacturing: process – Making device array and selectively interconnecting
Reexamination Certificate
2011-01-11
2011-01-11
Pham, Thanh V (Department: 2894)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
C438S287000, C438S288000, C438S588000, C257S324000, C257S331000, C257SE29309
Reexamination Certificate
active
07867831
ABSTRACT:
A flash memory device includes a substrate, a cell stack having a semiconductor layer, in which junction areas for setting areas therebetween to channel areas are formed in a shape of a stripe, and an interlayer isolation layer for insulating the semiconductor layer, wherein the semiconductor layer and the interlayer isolation layer are repeatedly stacked. The flash memory device further includes an array of gate columns penetrating through the cell stack, perpendicular to the substrate and cutting through the junction areas to dispose the junction areas at both sides thereof, and a trap layered stack introduced into an interface between the gate column and the cell stack to store charge.
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Hong Young Ok
Park Kyoung Hwan
Park Yu Jin
Shin Hack Seob
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Munoz Andres
Pham Thanh V
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