Manufacturing method of an electrically programmable non-volatil

Details Manufacturing method of an electrically programmable non-volatil Manufacturing method of an electrically programmable non-volatil

1992-01-10

1993-07-27

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 49, 437984, H01L 21266

Patent

active

052310418

ABSTRACT:
A 1-transistor type flash EEPROM is disclosed. The memory cell in the EEPROM includes a control gate formed on a silicon substrate with an insulating layer disposed between them, and a floating gate formed to extend over the upper face and one side face of the control electrode with an insulating layer disposed between them. Drain and source regions are created in the silicon substrate on the opposite sides of the control gate. The area in the silicon substrate under the control gate between the drain and source regions defines a channel region. In the EEPROM, an application of high-level voltage to the control gate and the drain region produces hot electrons in the vicinity of the opposite ends of the drain region which are driven into the floating gate across the insulating layer, causing the floating gate to store data-representing charge. The flash EEPROM has uniform characteristics among memory cells and reduced cell area for improved miniaturization.

REFERENCES:
patent: 4513397 (1985-04-01), Ipri et al.
patent: 4853895 (1989-08-01), Mitchell et al.
patent: 4907197 (1990-03-01), Uchida
patent: 5081057 (1992-01-01), Corda
"A 128K Flash EDPROM Using Double-Polysilicon Technology", Gneorge Samachisa, et al., IEEE Journal of Solid State Circuits, vol. SC-22, No. 5, Oct. 1987, pp. 676-683.
"A New EPROM Cell with a Side-Wall Floating Gate for High-Density and High-Performance Device", Yoshihisa Mizutani, et al., 1985 IEEE, IEDM 85, pp. 635-638.
"A Novel High-Speed, 5-Volt Programming EPROM Structure with Source-Side Injection", A. I. Wu, et al., 1986 IEEE, IEDM 86, pp. 584-587.

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