Semiconductor device manufacturing: process – Making passive device – Stacked capacitor
Reexamination Certificate
1999-03-03
2001-11-27
Fourson, George (Department: 2823)
Semiconductor device manufacturing: process
Making passive device
Stacked capacitor
C438S765000
Reexamination Certificate
active
06323098
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a manufacturing method of a semiconductor device and, more specifically, to a manufacturing method of a semiconductor device that is suitable for miniaturization of a semiconductor device having a capacitor.
2. Description of the Background Art
FIG. 7
is a flowchart showing a former manufacturing method of a semiconductor device having a capacitor. In this former manufacturing method, first, a capacitor bottom electrode film is formed on a silicon wafer (step
10
). Specifically, polysilicon containing phosphorus as an impurity is deposited on the silicon wafer by CVD.
Then, a bottom electrode of a capacitor is formed by properly patterning the bottom electrode film by photolithography and dry etching (step
12
).
Then, a nitride film as an insulating film of the capacitor is formed on the bottom electrode (step
14
). Specifically, the nitride film is deposited on the bottom electrode by CVD by using dichlorosilane (SiH
2
Cl
2
) and ammonia (NH
3
) as materials.
FIG. 8
shows a series of processes that are executed in the insulating film (nitride film) deposition step. As shown in
FIG. 8
, in this step, evacuation of a reaction furnace, increasing of silicon wafer temperature, formation of a nitride film by CVD, and a purge are performed consecutively. In the former manufacturing method, the evacuation, the temperature increasing, and the purge are performed in a nitrogen atmosphere.
Upon completion of the insulating film formation, wet oxidation is performed on the surface of the insulating film (step
16
). This step is intended to repair defects that are included in the nitride film (insulating film) to thereby improve the electrical characteristics of the capacitor and increase its reliability. In the former manufacturing method, the wet oxidation is performed by heating the silicon wafer at 800° C.-900° C. in water vapor that is obtained by mixing hydrogen and oxygen.
To activate the impurity that is contained in the bottom electrode, it is necessary to subject the silicon wafer to a heat treatment. In the former manufacturing method, the impurity in the bottom electrode can be activated by heat that is applied to the silicon wafer during the above wet oxidation.
After completion of the wet oxidation of the insulating film, a top electrode film is formed on the insulating film (step
18
). In the former manufacturing method, the top electrode film is formed by depositing polysilicon that contains phosphorus at a concentration of about 5×10
20
atoms/cm
3
.
The thus-formed top electrode film is then patterned properly by photolithography and dry etching into a top electrode of the capacitor (step
20
).
Then, to sufficiently activate the impurities contained in the top and bottom electrodes, a heat treatment is performed on the silicon wafer at 800° C.-900° C. for about 30 minutes (step
22
).
However, in semiconductor devices, there may occur a case that capacitors are manufactured after forming transistors on a silicon wafer. In such a situation, there may occur an event that when the above-described wet oxidation (step
16
) and heat treatment (step
22
) are performed in manufacturing capacitors, heat that is applied to transistors and their vicinities causes diffusion of impurities that are implanted in various parts of the transistors. In particular, if the size of the transistors is enough small, i.e., if the semiconductor device is sufficiently miniaturized, the diffusion may disable normal operation of the transistors.
In such semiconductor devices as a memory equipped with a logic circuit, one method of increasing the operation speed is to form a metal wiring (word lines and bit lines) under capacitors. In this case, if the temperature of the silicon wafer exceeds the heat resistant temperature of the metal wiring in manufacturing the capacitors, defects may occur in the metal wiring to render the semiconductor device inoperative.
For the above reasons, to miniaturize a semiconductor device or increase its operation speed, it is desirable that heat treatments in a capacitor manufacturing process be performed at as low a temperature as possible. In this respect, former manufacturing methods of a semiconductor device still have room for improvement.
SUMMARY OF THE INVENTION
The present invention has been conceived to solve the previously-mentioned problems, and a general object of the present invention is to provide a novel and useful manufacturing method of a semiconductor device having a capacitor.
A more specific object of the present invention is to provide a manufacturing method which can reduce the temperatures of heat treatments that are necessary for formation of a capacitor without impairing its characteristics.
The above object of the present invention is achieved by a manufacturing method having the steps described below. The method have a step for forming a bottom electrode of the capacitor and a step for forming a nitride film as an insulating film of the capacitor on the bottom electrode by CVD. The nitride film forming step includes the substep of increasing a temperature of a silicon wafer to a CVD reaction temperature in an ammonia atmosphere. The method also has a step for wet-oxidizing the insulating film at a temperature in a range of 700° C. to 760° C. The method further has a step for forming a top electrode of the capacitor on the insulating film.
The above object of the present invention is also achieved by a manufacturing method having the steps described below. The method includes a step for forming a bottom electrode of the capacitor and a step for forming a nitride film as an insulating film of the capacitor on the bottom electrode by CVD. The method also includes a step for performing annealing at a temperature in a range of 700° C. to 760° C. in an atmosphere containing an N
2
O gas after formation of the insulating film. The method further includes a step for forming a top electrode of the capacitor on the insulating film.
The above object of the present invention is also achieved by a manufacturing method having the steps described below. The method includes a step for forming a bottom electrode of the capacitor and a step for forming an insulating film of the capacitor on the bottom electrode. The method also includes a step for depositing, on the insulating film, an amorphous silicon film containing phosphorus at a concentration of 8×10
20
atoms/cm
3
or more as a film for forming an insulating film of the capacitor. The method further includes a step for performing rapid thermal annealing at a temperature close to 750° C. for a period in a range of 1 to 3 minutes after deposition of the amorphous silicon film.
Other objects and further features of the present invention will be apparent from the following detailed description when read in conjunction with the accompanying drawings.
REFERENCES:
patent: 5371039 (1994-12-01), Oguro
patent: 5663087 (1997-09-01), Yokozawa
patent: 5917211 (1999-06-01), Murata et al.
patent: 6025248 (2000-02-01), Kim et al.
patent: 9-82819 (1997-03-01), None
Inaba Yutaka
Mori Kiyoshi
Ogata Tamotsu
Tsuchimoto Junichi
Estrada Michelle
Fourson George
McDermott & Will & Emery
Mitsubishi Denki & Kabushiki Kaisha
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