Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material
Reexamination Certificate
2005-02-22
2005-02-22
Flynn, Nathan J. (Department: 2812)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Grooved and refilled with deposited dielectric material
C438S243000, C438S424000, C438S425000, C438S426000, C438S435000, C438S437000, C438S524000
Reexamination Certificate
active
06858516
ABSTRACT:
A manufacturing method of a high aspect ratio shallow trench isolation region. A substrate with a trench therein is provided and placed into a chamber. A first insulation layer is formed on the substrate as well as inside the trench by high density plasma chemical vapor deposition. The majority of the first insulation layer outside the trench is removed by in situ etching using carbon fluoride as an etching gas with high selectivity for SiO2/SiN etching ratio, and a second insulation layer is formed on the first insulation layer by high density plasma chemical vapor deposition, filling the trench. According to the present invention, a high aspect ratio shallow trench isolation region without voids can thus be achieved.
REFERENCES:
patent: 5888414 (1999-03-01), Collins et al.
patent: 6180490 (2001-01-01), Vassiliev et al.
Ho Hsin-Jung
Ho Tzu-En
Wu Chang Rong
Flynn Nathan J.
Issac Stanetta D.
Ladas & Parry
Nanya Technology Corporation
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