Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Thinning of semiconductor substrate
Reexamination Certificate
2002-06-07
2004-06-08
Niebling, John F. (Department: 2812)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Thinning of semiconductor substrate
C438S455000
Reexamination Certificate
active
06746938
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a method of manufacturing a semiconductor device. More specifically, it relates to a method of manufacturing a compound semiconductor device using viaholes (through-chip holes) in order to improve the high frequency properties of the semiconductor device or to prevent temperature rise.
2. Description of the Related Art
A technique for the formation of “viaholes” has become important in monolithic microwave integrated circuits (hereinafter abbreviated as MMICs) and other superhigh frequency semiconductor devices. In this technique, a substrate is grounded from its back side via through-chip holes in order to improve the high frequency properties or to dissipate heat generated during operation.
Such viaholes are generally formed according to the following process as described in, for example, Proc. IEEE GaAs IC Symposium, pp. 267-270 (1992). Specifically, a semiconductor substrate carrying a semiconductor device formed on its principal surface is thinned by backside grinding, backside lapping or polishing, the thinned semiconductor substrate is reversed and is affixed to a base wafer such as a glass substrate with the use of, for example, heat-resistant waxes, and the substrate is subjected to dry etching or wet etching from the back side of the substrate on which no semiconductor device is formed to thereby form viaholes.
However, the aforementioned process cannot significantly use highly selective dry etching masks such as SiO
2
films or metal masks that are allowed to adhere to the substrate by treatment at elevated temperatures, since waxes used to affix the thinned substrate in this process are softened during processing of the viaholes at such elevated temperatures.
Accordingly, the process can only use mask materials such as negative type thick layer photoresists. However, with reference to
FIG. 1A
schematically illustrating a cross section of a formed viahole, these mask materials exhibit low selectivity with respect to a semiconductor material
1
and cannot significantly be controlled in viahole dimension due to regression
3
of a mask
2
to thereby fail to form a fine viahole
13
.
In addition, the resist mask
2
is regressed during the dry etching process, and the regression
3
of the resist mask
2
affects a side wall to be processed to thereby invite a rough surface
4
of the side wall. Such a rough side wall may decrease the coverage of a metal during the subsequent metal plating process. A demand has therefore been made on a highly selective mask material that can form a mask at low temperatures and can yield, by etching, a viahole-region having a smooth side wall as shown in
FIG. 1B
, exhibiting high anisotropy and having a good sectional shape.
SUMMARY OF THE INVENTION
Accordingly, an object of the present invention is to solve the problems of the conventional technologies and to provide a method of manufacturing a semiconductor device, which method can form fine viaholes in high yields and can thereby produce a high-performance superhigh-frequency semiconductor device by the use of a mask material that has high dry etching resistance and can form a mask at low temperatures in a process for forming viaholes of a semiconductor.
Specifically, the present invention provides, in a first aspect, a method of manufacturing a semiconductor device. The method includes the steps of forming at least an active device on a principal surface of a semiconductor substrate; etching the semiconductor substrate to thereby form a viahole adjacent to an active region where the active device is formed; and forming a plated wiring, which plated wiring includes the inner wall of the viahole and extends to an electrode of the active device on the surface of the substrate. In this method, a photo sensitive polyimide material is used as an etching mask in the step of forming a viahole.
In the above method, the step of forming a viahole may include the step of etching the semiconductor substrate from the surface of the substrate on which the active device is formed.
Alternatively, the step of forming a viahole may include the step of etching the semiconductor substrate from the back side of the substrate opposite to the surface on which the active device is formed.
In a second aspect, the present invention provides another method of manufacturing a semiconductor device. The method includes the steps of forming at least an active device on a principal surface of a semiconductor substrate; etching the semiconductor substrate with the use of a photo sensitive polyimide material as an etching mask from the surface of the substrate on which the active device is formed to thereby form a viahole adjacent to an active region where the active device is formed; forming a plated wiring, which plated wiring includes the inner wall of the viahole and extends to an electrode of the active device on the surface of the substrate; reversing the substrate and temporarily fixing the reversed substrate on a base wafer with an adhesive; grinding or polishing the back side of the semiconductor substrate temporarily fixed on the base wafer to thereby thin the substrate; subjecting the thinned substrate to wet etching to thereby make the plated wiring at the inside bottom of the viahole open; and separating the semiconductor substrate carrying the viahole from the base wafer.
In the above methods according to the first and second aspects, the semiconductor substrate may be a substrate including a multi-layer epitaxial film of III-V compound semiconductor.
In a third aspect, the present invention provides another method of manufacturing a semiconductor device. This method includes the steps of forming at least an active device on a principal surface of a semiconductor substrate; etching the semiconductor substrate with the use of a photo sensitive polyimide material as an etching mask from the surface of the substrate on which the active device is formed to thereby form a viahole adjacent to an active region where the active device is formed; forming a plated wiring, which plated wiring includes the inner wall of the viahole and extends to an electrode of the active device on the surface of the substrate; reversing the substrate and temporarily fixing the reversed substrate on a base wafer with an adhesive; grinding or polishing the back side of the semiconductor substrate temporarily fixed on the base wafer to thereby thin the substrate; etching the thinned substrate with the use of a photo sensitive polyimide material as an etching mask in a region to be a viahole and a region directly underneath the active device on the surface of the substrate from the back side of the substrate to make the plated wiring at the inside bottom of the viahole open to thereby form a viahole structure and a heat-sink structure in one process step; plating a metal on overall of the back side of the substrate to thereby form a plated metal layer; and separating the semiconductor substrate carrying the viahole from the base wafer.
The present invention also relates to a method of forming a viahole. The method includes the steps of forming a pilot hole having a depth of about several micrometers to ten micrometers with an accuracy of from 0.01 micrometer to several micrometers in a region to be a viahole from its surface using a very highly selective silicon oxide film or metal mask; reversing the substrate and thinning the reversed substrate from its back side to a finishing thickness of the substrate; etching the thinned substrate from the back side thereof according to the method of the first aspect of the present invention to thereby form a deep hole having a diameter of opening space larger than that of the pilot hole; and thus connecting the deep hole and the pilot hole with each other to thereby form a viahole.
The present invention also relates to a technique in which viaholes are formed according to the method of the first or second aspect of the invention, the formed viaholes are covered with or filled with a metal by vapor depo
Shiota Takashi
Uchiyama Hiroyuki
Miles & Stockbridge P.C.
Roman Angel
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