Manufacturing method for semiconductor device

Details Manufacturing method for semiconductor device Manufacturing method for semiconductor device

1990-05-02

1992-06-09

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

437 62, 437 43, 437 78, 437203, 437 90, 148DIG150, 148DIG164, H01L 21265

Patent

active

051206668

ABSTRACT:
In the manufacture of MISFETs using an Si layer island having an SOI structure, the present invention provides an Si layer over an SiO.sub.2 insulation layer, having a groove passing underneath the Si layer gate region and being formed on the surface of the SiO.sub.2 insulation layer by side etching conducted from both sides of the Si layer gate region, so as to form the source and drain. Next, after the SiO.sub.2 insulation layer is formed on the exposed surface of the Si layer gate electrode, a doped polysilicon region is formed through the SiO.sub.2 insulation film in such a manner that the groove and the area surrounding the Si layer gate region are filled, thereby forming the gate electrode. Thereafter, the MISFET is completed according to ordinary FET manufacturing methods.

REFERENCES:
patent: 4649627 (1987-03-01), Abernathey et al.
patent: 4692994 (1987-09-01), Moniwa et al.
patent: 4774196 (1988-09-01), Blanchard
patent: 4888300 (1989-12-01), Burton

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