Manufacturing method for ROM array with minimal band-to-band tun

Details Manufacturing method for ROM array with minimal band-to-band tun Manufacturing method for ROM array with minimal band-to-band tun

1996-06-13

1997-11-04

Chaudhari, Chandra

Fishing, trapping, and vermin destroying

437 48, 148DIG116, H01L 218246

Patent

active

056839251

ABSTRACT:
A method of manufacturing a ROM array to minimize band-to-band tunneling is described. The method includes the steps of: a) implanting bit lines into the core area of a substrate as per a later-removed bit line mask, b) providing a ROM oxide layer over the entirety of the substrate, c) etching the ROM oxide layer only from the periphery area as per a later-removed core protect mask, d) providing a gate oxide layer over the entirety of the ROM array, e) laying down polysilicon rows in the core area as per a polysilicon mask and f) implanting a ROM implant into selected areas of the core area, thereby to produce turned off core transistors. The thickness of the gate oxide layer and the ROM oxide layer are independent of each other.

REFERENCES:
patent: 5308781 (1994-05-01), Ando et al.
patent: 5470774 (1995-11-01), Kunitou
patent: 5504030 (1996-04-01), Chung et al.
patent: 5580809 (1996-12-01), Mori et al.

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