Manufacturing method for a processor module with dual-bank SRAM

Details Manufacturing method for a processor module with dual-bank SRAM Manufacturing method for a processor module with dual-bank SRAM

1998-09-28

1999-08-24

Tran, Andrew Q.

Metal fusion bonding

Process

Plural joints

361763, 361743, 361782, 361811, 365 51, 365 63, 365226, B23K 3102

Patent

active

059414472

ABSTRACT:
A processor module has a cache of SRAM chips mounted on both a back and a front surface but de-coupling capacitors mounted on only the back surface. Each de-coupling capacitor is for suppressing current spikes from a pair of SRAM chips. The pair of SRAM chips includes a first SRAM chip on the same surface as the capacitor and a second SRAM chip opposite the first SRAM chip on the front surface of the module. The first SRAM chip belongs to a first bank while the second SRAM chip belongs to a second bank. Two chip-enable signals control access to the two banks. Since only one bank is accessed at any time, and access causes current spikes, only one bank and only one SRAM chip in the pair of SRAM chips creates a current spike at any time. Thus, a capacitor can be shared between the two SRAM chips in the pair. The shared capacitor can be mounted next to or under one of the SRAM chips, or formed within the multi-layer substrate itself. Having capacitors on only one of the surfaces reduces the number of placement sequences required, reducing manufacturing cost. The capacitors are mounted on the opposite surface from the large processor for efficiency.

REFERENCES:
patent: 5010447 (1991-04-01), Wallace
patent: 5412538 (1995-05-01), Kikinis et al.
patent: 5856937 (1999-01-01), Chu et al.

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