Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material
Reexamination Certificate
1998-12-01
2001-01-23
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
C438S592000, C438S595000, C438S655000, C438S306000, C438S303000
Reexamination Certificate
active
06177334
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of Invention
The present invention relates to a manufacturing method capable of preventing the corrosion of a metal-oxide-semiconductor (MOS). More particularly, the present invention relates to a manufacturing method that uses a protective oxide layer capable of preventing corrosion during subsequent cleaning operations.
2. Description of Related Art
A MOS transistor is an important semiconductor device in an integrated circuit. The MOS transistor acts like a switch that can be switched ON or OFF through its voltage. Since the MOS transistor is a major component in the operation of the VLSI circuit, any deviation in the components' voltage sensitivity can lead to serious control problems.
FIGS. 1A through 1C
are schematic, cross-sectional views showing the progression of manufacturing steps according to a conventional method of producing a MOS device.
First, as shown in
FIG. 1A
, a gate oxide layer
12
is formed over a silicon substrate
10
. Then, a polysilicon layer
13
is deposited over the gate oxide layer
12
. Next, a silicide layer
14
is formed over the polysilicon layer
13
. Thereafter, a top cap layer
15
is deposited in sequence over the silicide layer
14
.
Next, as shown in
FIGS. 1B and 2
, photolithographic and etching operations are conducted to pattern a gate structure
18
. The gate structure
18
is composed of a gate oxide layer
12
, polysilicon layer
13
, silicide layer
14
and top cap layer
15
.
Next, as shown in
FIGS. 1C and 2
, subsequently, using the top cap layer
15
as a mask, a first ion implantation is carried out, implanting ions into the substrate
10
to form lightly doped source/drain regions
16
.
Thereafter, as shown in
FIGS. 1D and 2
, spacers
17
are formed on the sidewalls of the gate structure
18
. Finally, using the gate structure
18
and the spacers
17
as masks, a second ion implantation is carried out, again implanting ions into the substrate to form heavily doped source/drain regions
11
.
In general, the silicide layer
14
is formed using tungsten silicide. However, the tungsten silicide layer has some disadvantages as follows:
(1) Threshold voltage is affected: In a dual gate CMOS transistor, the P-type ions in the P-type gate and the N-type ions in the N-type gate can cross-diffuse into each other through the tungsten silicide layer in the thermal process. This cross-diffusion of different type ions causes a serious shift in the threshold voltage.
(2) Resistance is affected: The tungsten silicide has a higher sheet resistance which induces a serious delay in the response time of the MOS and reduces the operating speed of the integrated circuit.
For at least the reasons described above, titanium silicide is used to replace the tungsten silicide and to improve the yield of the MOS. However, a thin layer of polymer is formed on the surface of the substrate
10
, after the ion implantation step is performed. The thin polymer layer reduces the electric sensitivity between the gate, drain region, and source region. Therefore, it is necessary to remove this thin polymer layer by using strong acidic etchant, such as hydrogen fluoride solution. Unfortunately, corrosion occurs on the silicide layer
14
during the removal process, as seen in
FIG. 3
which seriously reduces the resistance of the gate.
SUMMARY OF THE INVENTION
Accordingly, the present invention provides a method for manufacturing MOS that is capable of preventing acid corrosion. The method includes using a protective oxide layer to prevent the corrosion effect and to improve the yield.
To achieve these and other advantages and in accordance with the purpose of the invention, as embodied and broadly described herein, the invention provides a method for manufacturing a MOS gate capable of preventing acid corrosion. The manufacturing method includes the steps of sequentially forming a polysilicon layer, a silicide layer and a top cap layer over a substrate, and then etching to form a gate structure. Next, a rapid thermal process is carried out to form an oxide layer over the exposed sidewalls of the silicide layer. Next, the substrate is cleaned followed by the formation of a source/drain region having a lightly doped drain structure on each side of the gate.
It is to be understood that both the foregoing general description and the following detailed description are exemplary, and are intended to provide further explanation of the invention as claimed.
REFERENCES:
patent: 6001718 (1999-12-01), Katata et al.
patent: 6001719 (1999-12-01), Cho et al.
Chen Jacob
Chen Tung-Po
Lin Yung-Chang
Bowers Charles
Hickman Coleman & Hughes LLP
Nguyen Thanh
United Microelectronics Corp.
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