Manufacturing a wiring formed inside a semiconductor device

Details Manufacturing a wiring formed inside a semiconductor device Manufacturing a wiring formed inside a semiconductor device

1989-07-07

1992-05-05

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437192, 437195, H01L 2144

Patent

active

051107627

ABSTRACT:
A method of manufacturing wiring layers of semiconductor devices in which a base layer made of electroconductive material is formed on a wiring-intended area of the substrate surface and an insulating layer is formed on the area other than the wiring intended area. Then the wiring layer is grown on the base layer up to substantially the same level as that of the insulating layer up, hereby planarity of the surfaces of the device is maintained after wiring formation.

REFERENCES:
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patent: 4582563 (1986-04-01), Hazuki et al.
patent: 4666737 (1987-05-01), Gimpelson
patent: 4720908 (1988-01-01), Wills
patent: 4764484 (1988-08-01), Mo
patent: 4800177 (1989-01-01), Nakamae
patent: 4822753 (1989-04-01), Pintchokski
E. K. Broadbent et al., "High-Density High-Reliability Tungsten Interconnection by Filled Interconnect Groove Metallization", IEEE Transactions on Electron Devices, vol. 34, No. 7, Jul. 1988, pp. 952-956.

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