Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Including dielectric isolation means
Patent
1995-06-05
1996-10-01
Prenty, Mark V.
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Including dielectric isolation means
257308, H01L 2900, H01L 27108
Patent
active
055613144
ABSTRACT:
A method of manufacturing a semiconductor device capable of isolating fine pattern elements by using LOCOS. The method includes the steps of: (a) forming a relatively thick first nitride film pattern on the surface of a semiconductor substrate having an oxide film; (b) wet-etching the oxide film by using the first nitride film as a mask; (c) filling the under-etch region of the first nitride film with nitride and forming a second nitride film thinner than the first nitride film on the exposed surface of the semiconductor substrate; (d) thermally oxidizing all the exposed second nitride film in a dry oxygen atmosphere to form an oxide film on the surface of the semiconductor substrate at least at the region not covered with the first nitride film; and (e) forming a thermal oxide film on the semiconductor substrate not covered with the first nitride film at a temperature lower than the oxidation temperature at the step (d).
REFERENCES:
patent: 4295266 (1981-10-01), Hsu
patent: 5151381 (1992-09-01), Liu et al.
patent: 5214304 (1993-05-01), Ema et al.
patent: 5254494 (1993-10-01), Van Der Plas et al.
patent: 5369052 (1994-11-01), Kenkare et al.
Ema Taiji
Katayama Masaya
Fujitsu Limited
Fujitsu VLSI Limited
Prenty Mark V.
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