Managing interrupt requests from IP cores

Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing

Reexamination Certificate

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C716S101000, C716S111000

Reexamination Certificate

active

08079009

ABSTRACT:
A system and method of managing interrupt requests from IP cores within an integrated circuit design can include capturing environmental constraints within constraint files for the integrated circuit design (where the constraints can include information regarding a board upon which an integrated circuit device is mounted, pin locations for interrupt signals, and the sensitivity of the interrupt signals), generating connections among interrupt sources, interrupt controllers, and interrupt request ports on microprocessor cores within a device environment, and automatically instantiating controller logic when interrupt controllers are lacking during compilation of the device design. The method and system can also identify within the design, processor and bus interconnections as well as each interrupt port on the IP cores and the sensitivity requirements for each port which can be stored within description files for a corresponding IP core instead of an HDL specification.

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