Making solder ball mounting pads on substrates

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Solder wettable contact – lead – or bond

Reexamination Certificate

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Details

C257S780000, C257S781000

Reexamination Certificate

active

06201305

ABSTRACT:

BACKGROUND
1. Technical Field
This invention pertains generally to the mounting and connecting of electronic devices, and more particularly, to a method of making an improved solder ball mounting pad on a substrate.
2. Related Art
An increasing demand for electronic equipment that is smaller, lighter, and more compact has resulted in a concomitant demand for semiconductor packages that have smaller outlines and mounting “footprints.”
One response to this demand has been the development of the so-called “flip-chip” method of attachment and connection of semiconductor chips to substrates. Sometimes referred to as the “Controlled Collapse Chip Connection,” or “C
4
,” method, the technique involves forming balls of a conductive metal, e.g., solder or gold, on input/output connection pads on the active surface of the chip, then inverting, or “flipping” the chip upside-down, and “reflowing” the conductive balls, i.e., heating them to the melting point, to fuse them to corresponding connection pads on a substrate.
Another response has been the development of so-called ball grid array (“BGA”) semiconductor packages that “surface mount” and electrically connect to an associated substrate, e.g., a printed circuit board (“PCB”), with a plurality of solder balls in a method, sometimes referred to as the “C
5
” method, that is analogous to the flip-chip method described above for mounting and connecting dies.
In both the C
4
die and C
5
package mounting and connection methods, a plurality of solder balls are attached to respective solder ball mounting lands, or pads, defined on a surface of the die or package. The solder ball mounting pad may, but need not be, defined by an opening in an insulative layer or mask called a “passivation layer” in the case of a semiconductor die, or a “solder mask” in the case of a BGA package, as described below.
FIG. 1A
is a top plan view of a portion of a substrate
10
having a solder-mask-defined (“SMD”) solder ball mounting pad
28
formed thereon in accordance with the prior art.
FIG. 1B
is a cross-sectional view looking into the substrate
10
and pad
28
along the lines IB—IB in FIG.
1
A. The substrate
10
may comprise a sheet
12
of an insulative material, such as fiberglass, polyimide tape, or ceramic, or alternatively, it may comprise a semiconductor chip or die.
The pad
28
typically comprises a layer of metal, e.g., copper, aluminum, gold, silver, nickel, tin, platinum, or a combination of the foregoing that has been laminated and/or plated on a surface of the sheet
12
, then patterned using known photolithography techniques into a central pad structure
14
, which may include one or more circuit traces
16
(shown by dotted lines) radiating outward from it. Alternatively, or in addition to the traces
16
, a plated-through hole, called a “via”
18
(shown by dotted lines), may connect the central pad
14
with the opposite surface of the sheet
12
.
An insulative mask
20
, referred to as a passivation layer in the case of a semiconductor die, or a solder mask in the case of a BGA package, is formed over the metal layer, including the central pad
14
. The insulative layer
20
may comprise an acrylic or a polyimide plastic, or alternatively an epoxy resin, that is silk screened or photo-deposited on the sheet
12
. An opening
22
is formed in the insulative mask
20
to expose a central portion
28
of the central pad
14
, and a solder ball
24
(shown dotted in
FIG. 1A
) is attached to the pad
28
thus exposed. Since the mask
20
prevents the solder of the solder ball
24
from attaching to any portion of the central pad
14
other than the portion
28
that is exposed through the opening
22
, the pad
28
is referred to a solder-mask-defined or SMD-type of solder ball mounting pad, as above.
A non-solder-mask-defined (“NSMD”) solder ball mounting pad
28
in accordance with the prior art is illustrated in the plan view of
FIG. 2A
, wherein features similar to those in the SMD pad
28
of
FIG. 1A
are numbered similarly.
FIG. 2B
is a cross-sectional view looking into the substrate
10
and pad
28
along the section lines IIB—IIB in FIG.
2
A.
As may be seen from a comparison of the two sets of figures, the respective pads
28
are very similar, the exception being the size of the opening
22
in the insulative mask
20
. In particular, in the NSMD pad
28
of
FIGS. 2A and 2B
, the opening
22
exposes the entire central pad
14
, along with a portion of the surface of the sheet
12
and a portion of the optional circuit trace
16
, such that the molten solder of the solder ball
24
can wet and attach to not only the entire upper surface of the central pad
14
, but also to the vertical side walls
26
of the pad and the circuit trace.
While each of the SMD and the NSMD prior art solder ball mounting pads
28
has some advantages associated with it, each also has some disadvantages, as well. The SMD pad
28
shown in
FIGS. 1A and 1B
is the most commonly used solder ball mounting pad today. It provides good “end-of-line” (i.e., at the end of the semiconductor package fabrication line) ball
24
shear resistance because, as may be seen in
FIG. 1A
, the insulative mask
20
overlaps the entire peripheral edge of the central pad
14
, and hence, resists ripping of the pad from the sheet
12
when mechanical forces act on the solder ball
24
attached thereto. However, as may be seen in
FIG. 2B
, the insulative mask
20
covers no part of the central pad
14
portion of the NSMD pad
28
, and consequently, the latter has a relatively lower end-of-line ball
24
shear resistance.
The SMD pad
28
also affords relatively better control of the “x-y” positional tolerances of the solder ball
24
, i.e., better control of the lateral position of the solder ball
24
on the surface of the sheet
12
, than does an NSMD pad
28
having one or more circuit traces
16
leading from it, such as the one shown in FIG.
2
A. This is because the x-y position of the ball
24
on the sheet
12
is affected by two positional parameters: 1) the position on the sheet
12
of the centroid of the opening
22
in the insulative mask
20
, and 2) the position on the sheet of the centroid of the area of metal
28
exposed by the opening in the mask, i.e., the area wetted by the molten solder of the ball
24
when the latter is attached to the pad
28
. In both instances, the center of gravity (“C.G.”) of the solder ball
24
tends to align itself over each of the two respective centroids. As a result, when the centroid of the opening
22
does not coincide with the centroid of the area of exposed metal
28
, the C.G. of the solder ball
24
will be positioned approximately half way along a line extending between the two centroids.
As may be seen in
FIG. 1A
, the shape, or “pattern,” of the area of the SMD pad
28
exposed by the circular opening
22
in the insulative mask
20
is, by definition, also circular, and hence, radially symmetrical about the centroid of the exposed area of the pad. Also by definition, the centroid of the pad
28
coincides with the centroid, viz., the center, of the circular opening
22
. Hence, so long as the opening
22
in the insulative mask
20
is located within the boundary of the central pad
14
, the x-y tolerances on the ball
24
will depend only on the x-y positional tolerances on the centroid of the opening
22
, and not on the x-y positional tolerances of the centroid of the pad
14
. The presence of the optional via
18
will not change that result, provided the latter is also centered in the opening
22
.
However, as may be seen in
FIG. 2A
, the shape of the NSMD pad
28
exposed by the opening
22
in the mask
20
, which includes the entire central pad
14
, as well as a portion of the circuit trace
16
, is only bilaterally symmetrical about a line passing through the center of the central pad and the circuit trace. Consequently, the centroid of the NSMD pad
28
, i.e., of the exposed area of metal, is shifted slightly toward the circuit trace
16
, and away from the centroid of the opening
22
, w

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