Making silicide gate level runners

Fishing – trapping – and vermin destroying

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Details

437192, 437193, 437189, 437200, 437 57, H01L 2946

Patent

active

049353764

ABSTRACT:
Integrated circuits are fabricated with thick self-aligned silicide runners on the field oxide by etching back the first dielectric to expose patterned polysilicon on the field oxide and then forming a silicide on the patterned polysilicon.

REFERENCES:
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patent: 4382827 (1983-05-01), Romado-Moran et al.
patent: 4392150 (1983-07-01), Courreges
patent: 4442591 (1984-04-01), Haken
patent: 4455737 (1984-06-01), Godejahn, Jr.
patent: 4619038 (1986-10-01), Pintchovski
patent: 4628590 (1986-12-01), Udo et al.
patent: 4734383 (1988-03-01), Ikeda et al.

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