Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2001-07-12
2003-01-28
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S082000
Reexamination Certificate
active
06512301
ABSTRACT:
BACKGROUND
This invention relates generally to the fabrication of electronic devices and particularly to techniques for electrically interconnecting two surfaces.
Surface mount technology involves using heat activated interconnects, normally called solder balls or bumps, that are positioned between two surfaces to be joined. For example, an integrated circuit may have an array of contacts on one surface that need to be connected to an array of contacts on a printed circuit board.
Solder balls or bumps are globules of solder that may be deposited on the contacts of surfaces to be joined. They are generally deposited at a temperature so that they slightly melt and adhere to the point where they are placed. The solder balls are placed on the contacts of one surface to be joined. Then the other surface is aligned over the solder balls, and the two surfaces may be joined merely by the application of heat.
Thus, surface mount technology enables two surfaces to be electrically connected in a very convenient way. A number of integrated circuits may be attached to the same printed circuit board all at the same time using the same heat step called a reflow step.
Generally, the two surfaces to be bonded may be relatively flat but need not be perfectly flat. When a typical solder bumped flip-chip is attached to a circuit board by reflowing the solder, the solder bumps collapse or flatten to some degree, as a result of wetting of the solder to the bonding pad of the circuit board. This collapse may accommodate some variation in the bump height and good electrical connections can be made even with variations in bump height of about 1 mil, the normal height being 4 mils. Thus, flip-chip bump suppliers routinely supply bumped devices that meet this requirement of bump height tolerance.
However, when one of the surfaces to be bump bonded has a curvature or non-planarity that exceeds the bump height tolerance, the possibility exists that ineffective electrical connections may be made between the surfaces. In one instance, some bumps may not actually reach both surfaces, creating an open. In other cases, the bumps may be too deformed by a surface irregularity, causing the bumps to squeeze outwardly and to make contact with adjacent bumps or adjacent electrical structures. This may result in shorts.
Thus, there is a need for a way to handle non-planarity that exceeds bump tolerances in bump bonding applications.
REFERENCES:
patent: 5686790 (1997-11-01), Curtin et al.
patent: 6088236 (2000-07-01), Tomura et al.
patent: 6184567 (2001-02-01), Fujisawa et al.
patent: 6294822 (2001-09-01), Nakata
Demarco James R.
Palanisamy Ponnusamy
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