Making coplanar layers of thin films

Chemistry: electrical and wave energy – Processes and products – Vacuum arc discharge coating

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156656, 204192E, C23C 1500

Patent

active

040352765

ABSTRACT:
A method for forming coplanar thin films, particularly conductor-insulator patterns, on a substrate. A pattern which includes a first thin film and an expendable material deposited thereon is formed on the substrate. The expendable material is selected so that it can be selectively removed by an etchant which does not attack the first thin film or an insulator which is to be deposited. The second thin film is deposited by RF sputtering at a bias which is sufficiently high to cause substantial reemission of the second film. This results in the covering of the exposed substrate surfaces and the upper surface of the material with the second film but leaving the side surfaces of the material exposed. The expendable material is then chemically etched so as to lift-off both the material and the second film deposited thereon, thereby leaving a coplanar pattern of first and second thin films.
In the preferred embodiment, the first thin film is a conductor and the RF sputtered second thin film is an insulator such as glass. Alternatively, the first thin film could be the insulator with the RF sputtered second film being the conductor, or both thin films could be dissimilar metals or insulators. Via hole studs, or feedthroughs, which are metallic interconnections between a first level conductive pattern (metallization) and a second level conductive pattern, may be formed by repeating substantially the same steps atop the first conductive pattern at desired locations. As many substantially coplanar levels as desired may be formed without the need for etching the second thin film.

REFERENCES:
patent: 3661761 (1972-05-01), Koenig
patent: 3804738 (1974-04-01), Lechaton et al.
patent: 3873361 (1975-03-01), Franco et al.
patent: 3976524 (1976-08-01), Feng
R. E. Jones et al. "Re-emission Coefficients of Si and SiO.sub.2 Films Deposited Through RF and DC Sputtering," J. Appl. Phys., vol. 38, Nov. 1967, pp. 4656-4662.
L. Maissel et al. "Re-emission of Sputtered SiO.sub.2 During Growth and its Relation to Film Quality," IBM J. Res. Dev., vol. 14, Mar. 1970.
O. Bilous et al., "Multilevel Wiring for Integrated Circuits," IBM Tech. Disclosure Bull., vol. 13, No. 2, July 1970, pp. 429-430.

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