Making a self aligned semiconductor device

Details Making a self aligned semiconductor device Making a self aligned semiconductor device

1988-01-04

1991-02-12

Hearn, Brian E.

Fishing, trapping, and vermin destroying

437 43, 437 44, 437 56, 148DIG141, H01L 21265

Patent

active

049923897

ABSTRACT:
A method of producing a semiconductor device of high integration density and high reliability with high yield, using self-alignment techniques, including forming a gate electrode on a semiconductor substrate of a first conductivity type with an insulating film arranged above and below it, forming a pair of first impurity regions of a second conductivity type mutually separated and self-aligned with the gate electrode in the substrate, and forming a wall consisting of insulator on at least one side face of the gate electrode and the upper and lower insulating films, forming a second highly doped impurity region of second conductivity type at greater depth in the substrate than the first impurity region in a self-aligned manner with respect to the wall, forming an electrode layer connected to the second impurity region, with at least a portion of the electrode extending over the upper insulating film of the gate electrode, and selectively forming a wiring layer on the electrode layer.

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