Multiplex communications – Pathfinding or routing – Switching a message which includes an address header
Reexamination Certificate
1998-10-23
2004-09-14
Phunkulh, Bob A. (Department: 2661)
Multiplex communications
Pathfinding or routing
Switching a message which includes an address header
C370S509000, C370S516000, C375S356000
Reexamination Certificate
active
06791987
ABSTRACT:
FIELD OF INVENTION
The invention resides in the field of data transport that does not carry timing information. In particular, the invention is concerned with synchronization of constant bit rate traffic among multiple systems without the use of timing information.
BACKGROUND OF INVENTION
Generically speaking, in
FIG. 1
, system A is transmitting and receiving data to and from system B over a interconnect system
10
which includes a telecommunications network, bus and the like, that is to say, systems A and B are exchanging data. The data rate at which these systems including the transport system exchange data among them is different form each other. In the figure, it is shown that system A runs its system based on its own system clock at frequency y and communicates with the network at a rate of frequency c. The network is shown as an example only and can be any interconnect mechanism, e.g., a bus etc. System B, on the other hand, has its system clock at frequency z and the data rate of communication with the network at frequency d. Of course, the communication between either system and the network is bi-directional in that the system or network transmits and receives data from the other end at the specified frequency. Ideally the data rates for system A and system B are fixed at the same frequency, i.e. c=d. If, however, frequency d of system B is larger (faster) than frequency c of system A, then system B will be consuming data at a faster rate than system A is transmitting. System B will need to insert some kind of data. In the other direction at the other end, system A is consuming data at a slower rate than system B is transmitting and at some point data will overflow system A's buffer causing loss data.
Voice and other constant bit rate traffic have a source system and a target system operate at the same bit rate. This is required such that the target system does not experience overflow (if the target is slower than that of the source) or underflow (if the target is faster than that of the source). If the target system and source system are directly connected or can be traced to the same clock, then they can maintain the same bit rate. This is shown in
FIG. 2. A
synchronous network or bus
12
will work at a common clock with frequency a. The connections between system A and the synchronous network and the connection between system B and the synchronous network will be a multiple of frequency a (in this case x). System A and system B will monitor the physical connection between the system and the network and modify their receive and transmit rate based on the network. Information transfer is now synchronized and there will be no lost data or extra data.
Unlike the synchronous system in which an exclusive path must be maintained for a duration of a call between the source system and destination system, in an asynchronous system, of which a packet network is a good example, the network transports a packet of data through one segment (route) after another of a path at a time until the packet reaches the destination system. Routes are selected by the network using certain criteria and therefore it is possible that a different packet of the same traffic travels through different routes to the same destination system. In an asynchronous network, a packet of data (or a burst of data packets) is launched toward a destination but usually the time of arrival at the destination is not guaranteed. The asynchronous networks, however, are very efficient because real time communication routes are only set up when needed and best routes can be selected for every packet.
As shown in all the attached figures, the medium through which two systems exchange data may be a network or it can be a bus which runs at its set frequency. In a synchronous environment, the both systems can refer to the bus frequency for timing.
Ever since the first practical packet systems were put into service there has been a desire to take advantage of the efficiency of packet systems for the transmission of the digitally encoded speech signals used in telephony. One of the most efficient and convenient and widely available data communications services is provided by the well known Internet. The Internet is implemented across various packet systems, operated in accordance with the Internet Protocol (IP). The IP is convenient as it permits communications from any source to any destination without the source and destination having to perform any actions in concert. In the last few years voice communication via personal computers using the IP has become popular.
But over an asynchronous system such has embedded asynchronous bus (e.g. CPCI(Compact PCI), VME, SBUS, PCI bus, ATM and Internet), there are no ways to transmit the bit rate clock or to synchronize to the same clock. The PCI bus is “Peripheral Component Interconnect” is a popular bus used in personal computers for attachment of PC peripherals i.e. video card. This would cause buffer over/under flow. Problems with the asynchronous networks are that the delay in arrival of packets at the destination is more or less irregular (jittery) and furthermore even the order of the packets may change at arrival.
To solve the over/under flow problems, it has been suggested that for video/PCM (voice, telephony) traffic, a large buffer should be used and when it empties recreate buffer. In other words, this is called “slip buffer”. Incoming data is stored in an elastic buffer while it is emptied by the system. If overflow occurs the elastic buffer is overwritten and the previous data is lost. If underflow occurs the elastic buffer is re-read causing the appearance of the data being received twice.
Another solution is to use DSP/algorithms to fix data loss problems. This requires the use of processor/DSP to fix lost/extra data but the processor/DSP can be quite expensive if many channels are used. If data is lost, algorithms will be required to verify data and retransmit any corrupted data such as lost bytes or repeated bytes.
A copending patent application Ser. No. 08/982,925 filed on Dec. 2, 1997 Ward et al has an assignee common to that of the present application. This application describes an invention that reduces the effects of non-synchronized operation and thereby improves the quality of the perceived speech being audibly reproduced from voice signal data transported via an IP or the like.
In the application, a jitter buffer is provided at the receiving entity to store frames of voice signal derived from incoming packets, order of packets being maintained with reference to the time stamps contained therein. Upon initiation of a call, consumption of data out of the buffer is delayed until the jitter buffer exceeds some predetermined amount of fullness where after received frames are made available for processing at a regular rate. Ideally as the rate of delivery fluctuates the fullness of the jitter buffer fluctuates in a corresponding manner, while frames are withdrawn at a regular rate as determined by the clock in the receiving entity for processing.
In this system then the regular rate as determined by the clock in the receiving entity for processing is still independent from the clock in the transmitting entity nor is it traced on the network clock. The present invention allows synchronization of rate of the receiving entity with that of the transmitting entity.
OBJECTS OF INVENTION
It is therefore an object of the invention to provide a mechanism for multiple data entities to synchronize data rates by which they exchange data through an asynchronous interconnect.
It is another object of the invention to provide a mechanism for a receiving entity to modify its data rate at which it exchanges data with an asynchronous interconnect to that of the transmitting entity.
It is yet a further object of the invention to provide a mechanism for multiple entities to synchronize each other for their data rates where no common timing information is available.
SUMMARY OF INVENTION
Briefly stated, in accordance with one aspect, the invention is directed to a me
Eng Glenn Daniel
Lynch John Cornelius
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