Maintaining output I/O signals within an integrated circuit...

Details Maintaining output I/O signals within an integrated circuit... Maintaining output I/O signals within an integrated circuit...

2007-12-13

2010-11-23

Paladini, Albert W (Department: 2836)

Electrical transmission or interconnection systems

Plural load circuit systems

Control of current or power

C323S234000

Reexamination Certificate

active

07839016

ABSTRACT:
An integrated circuit is provided with a power domain which can be selectively powered-up or powered-down. An output circuitry serving to buffer a signal generated by the core circuitry within such a power domain has its own output power supply voltage. An adaptive voltage sensing circuit senses when the core power supply voltage to the core circuitry falls below a threshold level and generates a voltage-low signal. If output signal retention has been preselected to be active for the output signal concerned, then the output circuitry responds to the voltage-low signal by maintaining the output signal state (output signal driven low, output signal driven high or output signal in a high impedance drive state). The retention mode is preselected by a pulse with its value stored within a mode latch indicating whether or not retention is required. Thus, when the adapted voltage sensing circuitry itself senses the voltage level for the core circuitry falling below the threshold, it activates the retention operation.

REFERENCES:
patent: 5721933 (1998-02-01), Walsh et al.
patent: 5739701 (1998-04-01), Oshima
patent: 6590444 (2003-07-01), Ikehashi et al.
patent: 6753698 (2004-06-01), Carpenter et al.
patent: 6950951 (2005-09-01), Flynn
patent: 7046063 (2006-05-01), Kuang et al.
patent: 7279927 (2007-10-01), Falkowski et al.
patent: 7312635 (2007-12-01), Tanaka et al.
patent: 7369815 (2008-05-01), Kang et al.
patent: 7593202 (2009-09-01), Khazhinsky et al.
patent: 1 098 239 (2001-05-01), None
patent: WO 2008/073883 (2008-06-01), None
UK Search Report dated Feb. 12, 2009 for GB 0818764.3.

Affiliated with

Also associated with

Rating

Maintaining output I/O signals within an integrated circuit... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Maintaining output I/O signals within an integrated circuit..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Maintaining output I/O signals within an integrated circuit... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4201504