Main memory initializing system

Details Main memory initializing system Main memory initializing system

1990-08-31

1993-08-10

Rudolph, Rebecca L.

Boots, shoes, and leggings

364DIG1, 3642384, 364246, 3642464, 36424691, 3642548, 364270, 3642702, G06F 1216, G06F 108

Patent

active

052356914

ABSTRACT:
A main memory control system has an initial data generating circuit for generating initial data, an initialization control circuit for activating an initialize signal in response to an initialize command, and a refresh control circuit that generates refresh addresses. When the initialize signal is inactive, the main memory control system performs normal read, write, and refresh operations. When the initialize signal is active, the main memory control system selects the initial data by means of a data multiplexer and performs only write operations, writing the initial data at refresh addresses generated by the refresh control circuit. If the main memory has an interleaved structure, the initial data are written in all banks simultaneously.

REFERENCES:
patent: 4006468 (1977-02-01), Webster
patent: 4236207 (1980-11-01), Rado et al.
patent: 4754425 (1988-06-01), Bhadriraju
patent: 4796232 (1989-01-01), House
patent: 4901283 (1990-02-01), Hanbury et al.

Affiliated with

Also associated with

Rating

Main memory initializing system does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Main memory initializing system, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Main memory initializing system will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1732491