Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2006-12-05
2006-12-05
Fourson, George R. (Department: 2823)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C257SE21665, C365S171000, C365S173000
Reexamination Certificate
active
07144744
ABSTRACT:
Magnetoelectronic memory element structures and methods for making such structures using a barrier layer as a material removal stop layer are provided. The methods comprise forming a digit line disposed at least partially within a dielectric layer. The dielectric material layer overlies an interconnect stack. A void space is etched in the dielectric layer to expose the interconnect stack. A conductive-barrier layer having a first portion and a second portion is deposited. The first portion overlies the digit line and the second portion is disposed within the void space and in electrical communication with the interconnect stack. A memory element layer is formed overlying the first portion and an electrode layer is deposited overlying the memory element layer. The electrode layer and the memory element layer are then patterned and etched.
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Durlam Mark A.
Lien Mitchell T.
Meixner Thomas V.
Wise Loren J.
Fourson George R.
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz
Maldonado Julio J.
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