Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
2005-05-10
2005-05-10
Tran, Michael (Department: 2818)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C257S423000
Reexamination Certificate
active
06890770
ABSTRACT:
A method for fabricating an MRAM device structure includes providing a substrate on which is formed a first transistor and a second transistor. An operative memory element device is formed in electrical contact with the first transistor. At least a portion of a false memory element device is formed in electrical contact with the second transistor. A first dielectric layer is deposited overlying the at least a portion of a false memory element device and the operative memory element device. The first dielectric layer is etched to simultaneously form a first via to the at least a portion of a false memory element device and a second via to the operative memory element device. An electrically conductive interconnect layer is deposited so the electrically conductive interconnect layer extends from the at least a portion of a false memory element device to the operative memory element device.
REFERENCES:
patent: 6587371 (2003-07-01), Hidaka
patent: 6649953 (2003-11-01), Cha
patent: 6657270 (2003-12-01), Kim et al.
Deherrera Mark
Durlam Mark A.
Grynkewich Gregory W.
Tracy Clarence J.
Freescale Semiconductor Inc.
Ingrassia Fisher & Lorenz P.C.
Le Thao P.
Tran Michael
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