Magnetic tape drive controller utilizing dual DMA controllers

Details Magnetic tape drive controller utilizing dual DMA controllers Magnetic tape drive controller utilizing dual DMA controllers

1985-10-22

1987-08-25

Williams, Jr., Archie E.

Boots, shoes, and leggings

360 39, G06F 724, G06F 1338

Patent

active

046897674

ABSTRACT:
A controller for use with a magnetic tape drive which has a plurality of buffer memories for temporarily storing data that is passed between the tape drive and a host computer system. Temporary storage of data within the tape controller allows data to be rewritten on the tape if the initial writing is faulty and allows data read from the tape to be reconstructed if the data has been erroneously recorded.
Transfer of information into and out of the buffer circuits is controlled by two independent direct memory access circuits--one circuit transfers data between the host computer system and the buffer memories and the other circuit transfer data between the buffer memories and the tape drive. Each of the direct memory access circuits operates independently of the other, however, both circuits are coordinated by a central processing unit which communicates with the direct memory access units by means of an interrupt arrangement.
The controller also contains a serial input/output unit which allows the controller to format and decode a data format that allows synchronous decoding of the data which in turn permits "on the fly" error correction.

REFERENCES:
patent: 4034349 (1977-07-01), Monaco et al.
patent: 4067059 (1978-01-01), Derchak
patent: 4380029 (1983-04-01), Bode
patent: 4387424 (1983-06-01), Frediani et al.
patent: 4393445 (1983-07-01), Milligan et al.
patent: 4500965 (1985-02-01), Gray
"8237/8237 High Performance Programmable DMA Controller", MCS/80/85 Family User's Manual, Oct. 1979.
Hillman DL, "Intelligent Buffer Reconciles Fast Processors and Slow Peripherals", Electronics, 9-11-1980, pp. 131-135.

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