Static information storage and retrieval – Read only systems – Magnetic
Reexamination Certificate
2001-11-23
2003-03-11
Hoang, Huan (Department: 2818)
Static information storage and retrieval
Read only systems
Magnetic
C365S171000, C365S173000
Reexamination Certificate
active
06532164
ABSTRACT:
DESCRIPTION
1. Technical Domain
This invention concerns a magnetic spin polarisation and magnetisation rotation device as well as a memory using such a device and a writing process.
It has applications in electronics and in particular for the manufacture of memory cells and MRAM (Magnetic Random Access Memory) type memories or direct access magnetic memories.
2. Previous State of the Technology
MRAM magnetic memories have enjoyed an increase in popularity with the development of magnetic tunnel junctions (MTJ) which exhibit high magneto-resistance at ambient temperature.
FIGS. 1A and 1B
in the appendix show a schematic representation of the structure and function of such a junction.
The junction is indicated by item
2
. It consists of a stack of a layer of oxide sandwiched between two magnetic layers. The system operates like a spin valve, apart from the fact that the current flows perpendicular to the plane of the layers. One of the magnetic layers is described as “free” because its magnetisation may be oriented by an external magnetic field (bi-directional arrow); the other is described as “anchored” because its magnetisation direction is anchored by an anti-ferromagnetic exchange layer (unidirectional arrow). When the magnetisation of the magnetic layers is anti-parallel, the resistance of the junction is high; when the magnetisation is parallel, the resistance is low. The relative variation of the resistance between these two states may be up to 40% by appropriate choice of materials.
Junction (
2
) is located between a switching transistor (
4
) and a current supply line (
6
). The current passing through the latter generates a magnetic field (
7
). A conductor (
8
), orthogonal to the current supply line (
6
) (i.e. in this case perpendicular to the plane of the figure) generates a second magnetic field (
9
) (located in the plane of the figure).
In “write” mode (FIG.
1
A), transistor (
4
) is blocked. Current flows through the current supply line (
6
) and the conductor (
8
). Junction (
2
) is therefore subjected to two orthogonal magnetic fields. One is applied along the difficult magnetisation axis in the free layer, in order to reduce its reversal field, the other being applied along the easy magnetisation axis in order to generate a reversal of the magnetisation and write in the memory cell. In principle, only the memory cell located at the intersection of lines (
6
) and (
8
) is subject to reversal, since each magnetic field taken individually is insufficient to cause reversal of the magnetisation.
In “read” mode (FIG.
1
B), the transistor is held in the saturated condition (i.e. the current flowing through it is at a maximum) by a positive current pulse in its base. The current flowing through line (
6
) only passes through the memory cell whose transistor is open. This current enables the resistance of the junction to be measured. By comparison with a reference memory cell, the state of the memory cell (“0” or “1”) may thus be determined.
Such a writing mechanism presents disadvantages particularly within a network of junctions.
1) As the reversal of the free layer magnetisation occurs under the effect of external fields, and since the reversal fields are statistically distributed, it is not impossible to accidentally reverse certain adjacent junctions simply by the effect of the magnetic field produced along the addressing line. As, for high density memories, the size of the memory cells is clearly sub-micronic, the number of addressing errors increases.
2) The reduction in size of memory cells results in an increase in the value of the individual reversal field; a larger current is therefore necessary to write in the memory cells, which tends to increase the electrical power consumption.
3) As writing necessitates two current lines at 90°, the constructional density is consequently limited by the presence of these lines.
4) The writing mode employed only enables writing into one memory cell at a time, if one wishes to minimise the danger of addressing errors.
Recently, other types of magnetic device have appeared, where the magnetic reversal is generated not by external magnetic fields but by electrons passing through the stack perpendicular to the plane of the layers. These devices are described in document U.S. Pat. No. 5,695,864. The mechanism employed is based on the transfer of magnetic moments between the electrons on the one hand, and the free layer magnetisation on the other hand. In such a system, the stack is formed of layers which are all electrically conducting, in order to limit the power dissipation. This results in several disadvantages
a) The resistance of the device is so low that a very high current must be injected in order to generate a voltage at the terminals comparable to that in conventional systems.
b) Such a current demands the use of a large size transistor, which limits the constructional density of the memory.
c) The amplitude of the variation in resistance obtained is very low (2-3%), which limits the output voltage.
d) For MRAM applications, the document referenced mentions three conductor levels and two voltage sources. A central conductor is intended to collect the polarised current used for reversal of the free layer. The device is therefore complex. The present invention is therefore aimed at overcoming these disadvantages.
PRESENTATION OF THE INVENTION
To this end, the invention proposes to use a means for polarising the spin of the electrons in a direction perpendicular to the common magnetisation plane of the stack and, essentially, to the magnetisation in the free layer. This magnetisation will therefore rotate around the polarisation direction of the spins, enabling different magnetic states to be attributed to the device.
More precisely, the invention therefore concerns a magnetic device consisting of:
a first magnetic layer known as the “anchored” layer, which exhibits a fixed magnetisation direction,
a second magnetic layer known as the “free” layer, which exhibits a variable magnetisation direction,
an insulating layer which separates the anchored and free layers,
means for passing a current of electrons through and perpendicular to the layers,
means for polarising the spin of those electrons, characterised in that the means for polarising the spin of a majority of the electrons include at least one magnetic layer whose magnetisation is perpendicular to the plane of the free layer magnetisation, this polarising magnetic layer being separated from the free layer by a non-magnetic conducting layer.
In one design, the magnetic polarising layer is a layer whose magnetisation is perpendicular to the plane of the layers, and in which the magnetisation of the anchored and free layers is located in the plane of the said layers, the spin of the electrons acting on the free layer magnetisation then being polarised perpendicularly to the plane of the free layer and the magnetisation of the latter rotating within the plane of the said free layer.
In another design, the magnetic polarising layer is a layer whose magnetisation is parallel to the plane of the layers, and the magnetisation of the anchored and free layers is located in a plane perpendicular to the said layers, the spin of the electrons acting on the magnetisation of the free layer then being polarised parallel to the said layer and its magnetisation rotating within a plane perpendicular to the said free layer.
The present invention also concerns a memory consisting of a matrix of memory cells addressable via addressing rows and columns, characterised in that each memory cell consists of a magnetic device as has just been described and by a means for current switching, connected in series with the magnetic device, each magnetic device being connected to an addressing row and each switching device being connected to an addressing column.
The present invention also concerns a process for writing data into a device as described above, characterised in that:
a current of electrons is passed through the device and perpendicularly to the plane of the layers, the said
Dieny Bernard
Redon Olivier
Rodmacq Bernard
Commissariat a l'Energie Atomique
Hoang Huan
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