Magnetic shift register and operation method thereof

Static information storage and retrieval – Magnetic shift registers

Reexamination Certificate

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C365S083000

Reexamination Certificate

active

07872896

ABSTRACT:
A magnetic shift register includes at least a magnetic memory track of which several walls separate the memory track into multiple magnetic domains to serve as magnetic binary memory cells. The magnetic memory track includes multiple data regions. Each data region has multiple of the magnetic binary memory cells for storing bit data at a quiescent state and registering at least one of the bit data shifted from the adjacent data region at a shifting state. Wherein, the bit data of the magnetic binary memory cells is shifted between the adjacent two data region under an operation current.

REFERENCES:
patent: 6834005 (2004-12-01), Parkin
patent: 6898132 (2005-05-01), Parkin
patent: 6955926 (2005-10-01), Chen et al.
patent: 7236386 (2007-06-01), Parkin
Article titled “Scalable Cell Technology Utilizing Domain Wall Motion for High-speed MRAM” authored by Numata, et al., 2007 Symposium on VLSI Technology Digest of Technical Papers, pp. 232-233.

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