Magnetic reproducing apparatus that limits distortion of an...

Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of biasing or erasing

Reexamination Certificate

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Details

C360S025000, C360S046000, C360S067000

Reexamination Certificate

active

06304401

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magnetic reproducing apparatus such as a floppy disk drive or hard disk drive.
2. Description of the Prior Art
A conventional magnetic reproducing apparatus will be described.
FIG. 3
is a circuit diagram of a reading circuit
40
in a conventional magnetic reproducing apparatus. In
FIG. 3
, a magnetic head
2
reads data recorded on a magnetic disk such as a floppy disk or hard disk. The two ends of the magnetic head are connected to terminals
22
and
23
of the reading circuit
40
, so that the signal reproduced by the magnetic head
2
is fed to the reading circuit
40
. The terminals
22
and
23
are connected to a preamplifier
24
and to an input bias setting circuit
34
, respectively. The preamplifier
24
amplifies, on a differential basis, the reproduced signal fed to the terminals
22
and
23
.
The preamplifier
24
outputs two amplified reproduced signals, of which one is fed to the base of an npn-type transistor Q
1
and of which the other is fed to the base of an npn-type transistor Q
2
. The collector of the transistor Q
1
is connected through a resistor R
1
to a supplied voltage Vcc, and the collector of the transistor Q
2
is connected through a resistor R
2
to the supplied voltage Vcc.
Between the emitters of the transistors Q
1
and Q
2
, a resistor R
3
is connected. In addition, in parallel with the resistor R
3
, a circuit having a resistor R
4
and a switch SW
1
connected in series is connected. Switching of the switch SW
1
is controlled by a control signal fed in via a terminal
43
. Between the emitter of the transistor Q
1
and ground, a constant current source circuit
25
is connected. Between the emitter of the transistor Q
2
and ground, a constant current source circuit
26
is connected. The transistors Q
1
and Q
2
, the resistors R
1
, R
2
, and R
3
, the serial circuit composed of the resistor R
4
and the switch SW
1
, and the constant current source circuits
25
and
26
together constitute a differential amplifier circuit
38
.
The collector of the transistor Q
1
is connected to the base of an npn-type transistor Q
3
. The collector of the transistor Q
2
is connected to the base of an npn-type transistor Q
4
. The collector of the transistor Q
3
is connected to the supplied voltage Vcc. The collector of the transistor Q
4
is connected to the supplied voltage Vcc. Between the emitter of the transistor Q
3
and ground, a constant current source circuit
27
is connected. Between the emitter of the transistor Q
4
and ground, a constant current source circuit
28
is connected. The emitter of the transistor Q
3
is connected to an output terminal
35
. The emitter of the transistor Q
4
is connected to an output terminal
36
.
The amplified reproduced signal output from the preamplifier
24
are further amplified on a differential basis by a differential amplifier circuit
41
that produces a single output. The output of this differential amplifier circuit
41
is fed to one input terminal of a comparator
42
. To the other input terminal of the comparator
42
, a reference voltage Va is fed. The comparator
42
compares the output of the differential amplifier circuit
41
with the reference voltage Va, and feeds the comparison result to the input bias setting circuit
34
. The differential amplifier circuit
41
, the comparator
42
, and the input bias setting circuit
34
together constitute a thermal asperity circuit
50
.
This conventional magnetic reproducing apparatus operates in the following manner. The signal reproduced by the magnetic head
2
is first amplified by the preamplifier
24
and is then fed to the differential amplifier circuit
38
. The amplification factor of the differential amplifier circuit
38
depends on the state of the switch SW
1
. Specifically, when the switch SW
1
is on, the resistors R
3
and R
4
are kept connected in parallel, and thus offer a smaller composite resistance. This reduces the resistance present on the emitter side of the transistors Q
1
and Q
2
, and thus increases the amplification factor of the differential amplifier circuit
38
. By contrast, when the switch SW
1
is off, the resistor R
4
is disconnected from the rest of the circuitry. This increases the resistance present on the emitter side of the transistors Q
1
and Q
2
, and thus reduces the amplification factor of the differential amplifier circuit
38
. Note that switching of the switch SW
1
is performed in accordance with the resistance of the magnetic head
2
and the level of the read signal.
Thus, the amplification factor of the differential amplifier circuit
38
is switched by the control signal fed in via the terminal
43
. The amplified reproduced signals are extracted from the collectors of the transistors Q
1
and Q
2
, and are then fed through the transistors Q
3
and Q
4
, provided as a final stage, to the output terminals
35
and
36
respectively for output.
In a case where the magnetic head
2
is, for example, a magnetic head provided with a magnetic resistance device (hereafter referred to as an “MR head”), the MR head
2
exhibits a higher equivalent resistance as it generates heat from contact with the magnetic disk. As the resistance of the MR head
2
increases, the bias voltage produced across that resistance by the current i output from the input bias setting circuit
34
increases accordingly.
The thermal asperity circuit (compensation circuit)
50
, by monitoring this bias voltage, compensates for variation in the bias voltage so as to keep it stably at a constant voltage. In the thermal asperity circuit
50
, the signal output from the preamplifier
24
is amplified by the differential amplifier circuit
41
, and the resulting output is compared with the reference voltage Va by the comparator
42
. The comparator
42
feeds the comparison result, either a high level or a low level, to the input bias setting circuit
34
. The input bias setting circuit
34
is controlled by the output of the comparator
42
in such a way as to reduce the current i it feeds to the magnetic head
2
and thereby reduce the bias voltage across the magnetic head
2
when the bias voltage becomes higher than the reference voltage specified by the reference voltage Va.
In the differential amplifier circuit
38
, the base bias of the transistor Q
1
is as indicated by B
1
in
FIG. 4A
, and the base bias of the transistor Q
2
is as indicated by B
2
in FIG.
4
A. An increase in the bias voltage resulting from an increase in the resistance of the magnetic head
2
causes an increase in the voltage difference W (bias) between those base biases B
1
and B
2
as a result of, for example, B
2
shifting upward and B
1
shifting downward (B
2
may remain fixed). However, the above-described thermal asperity circuit
50
acts to keep the bias constant, and therefore the base biases B
1
and B
2
can safely be regarded as kept substantially fixed.
However, this conventional magnetic reproducing apparatus tends to suffer from distortion that appears in the output signal when the switch SW
1
is turned on to increase the amplification factor of the differential amplifier circuit
38
. Specifically, whereas no problem arises as long as the reproduced signals S
1
and S
2
remain relatively small throughout as shown in
FIG. 4A
, when the signals S
1
and S
2
have large portions, they may go out of the dynamic range into the saturation region as shown in
FIG. 4B
when the amplification factor of the differential amplifier circuit
38
is increased. This causes distortion in the output signal.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a magnetic reproducing apparatus in which no distortion appears in the output signal when the amplification factor of a differential amplifier circuit is increased.
To achieve the above object, according to the present invention, a magnetic reproducing apparatus provided with a magnetic head for reading data recorded on a magnetic recording medium, an amplifier circuit fo

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