Dynamic magnetic information storage or retrieval – General recording or reproducing – Specifics of the amplifier
Reexamination Certificate
1999-07-29
2002-01-01
Neal, Regina Y. (Department: 2651)
Dynamic magnetic information storage or retrieval
General recording or reproducing
Specifics of the amplifier
C360S046000
Reexamination Certificate
active
06335844
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magnetic recording apparatus such as a floppy disk drive or hard disk drive.
2. Description of the Prior Art
A conventional magnetic recording apparatus will be described.
FIG. 4
is a circuit diagram of the writing circuit of a conventional magnetic recording apparatus. The writing circuit amplifies a write signal, by which data is written to a magnetic disk (not shown) such as a floppy disk or hard disk, so as to feed a write current I
7
or I
8
to a magnetic head
2
. In
FIG. 4
, the two ends of the magnetic head
2
are connected to output terminals
24
and
25
of the writing circuit. The magnetic head
2
has a center tap, which is connected to a supplied voltage Vcc. The write signal is fed in via two input terminals
40
and
41
.
The input terminal
40
is connected to the base of an npn-type transistor Q
11
. The input terminal
41
is connected to the base of an npn-type transistor Q
8
. The collector of the transistor Q
8
is connected to the supplied voltage Vcc. Between the base of the transistor Q
8
and the supplied voltage Vcc, a constant current source circuit
42
is connected. The constant current source circuit
42
outputs a current I
11
that flows from the supplied voltage Vcc to the base of the transistor Q
8
. Between the emitter of the transistor Q
8
and ground, a resistor R
6
is connected. Between the base of the transistor Q
8
and ground, a resistor R
5
is connected.
The collector of the transistor Q
11
is connected to the supplied voltage Vcc. Between the base of the transistor Q
11
and the supplied voltage Vcc, a constant current source circuit
43
is connected. The constant current source circuit
43
outputs a current I
12
that flows from the supplied voltage Vcc to the base of the transistor Q
11
. Between the base of the transistor Q
11
and ground, a resistor R
9
is connected. Between the emitter of the transistor Q
11
and ground, a resistor R
8
is connected.
The emitter of the transistor Q
8
is connected to the base of an npn-type transistor Q
9
. The emitter of the transistor Q
11
is connected to the base of an npn-type transistor Q
10
. The emitters of the transistors Q
9
and Q
10
are connected together, and, between this node and ground, a constant current source circuit
23
is connected. The constant current source circuit
23
outputs a constant current I
6
. The collector of the transistor Q
9
is connected to the output terminal
24
. The collector of the transistor Q
10
is connected to the output terminal
25
.
FIG. 5
is a circuit diagram showing the internal configuration of the constant current source circuit
42
. The emitter of a pnp-type transistor Q
30
is connected through a resistor R
20
to the supplied voltage Vcc. The collector of the transistor Q
30
is connected to a current source
50
. The current source
50
outputs a current I
20
. The base of the transistor Q
30
is connected to the collector of the transistor Q
30
and to the base of a pnp-type transistor Q
31
. Between the bases of the transistors Q
30
and Q
31
and ground, a parasitic capacitance
51
is present. The emitter of the transistor Q
31
is connected through a resistor R
21
to the supplied voltage Vcc. From the collector of the transistor Q
31
, the current I
11
is fed out.
This writing circuit is controlled by a controller
7
so as to be either in an active mode in which its data writing operation is permitted or in an inactive mode in which its data writing operation is inhibited. The controller
7
outputs a signal, which is fed to the gates of n-channel MOS transistors Q
13
and Q
14
. The sources of the MOS transistors Q
13
and Q
14
are each connected to ground. The drain of the MOS transistor Q
13
is connected to the input terminal
41
, and the drain of the MOS transistor Q
14
is connected to the input terminal
40
.
In the inactive mode, the controller
7
feeds a high-level signal to the writing circuit. This causes the MOS transistors Q
13
and Q
14
to be turned on. As a result, the ground voltage is fed to the bases of the transistors Q
8
and Q
11
, which are thus turned off. As a result, the ground voltage is fed to the bases of the transistors Q
9
and Q
10
, which are thus turned off. Consequently, the writing circuit does not operate as a whole, and thus does not feed the write current
17
nor I
8
to the magnetic head
2
.
By contrast, in the active mode, the controller
7
feeds a low-level signal to the writing circuit. This causes the MOS transistors Q
13
and Q
14
to be turned off. Consequently, the writing circuit can feed the write current I
7
or I
8
to the magnetic head
2
in synchronism with the signals fed in via the input terminals
40
and
41
.
However, in the circuit shown in
FIG. 4
, immediately after the supplied voltage Vcc starts being supplied in the magnetic recording apparatus, there is a possibility of a write current being unnecessarily fed to the magnetic head
2
before the entire apparatus becomes ready for writing operation. When electric power starts being supplied, the current source
50
is off, and thus does not output the current I
20
; however, a current Ic that momentarily flows into the parasitic capacitance
51
induces the base currents of the pnp-type transistors Q
30
and Q
31
, which are thus turned on momentarily, causing the current I
11
to flow momentarily. At this moment, if the controller
7
has not yet been started up completely, it cannot feed a high-level signal to the n-channel MOS transistor Q
13
, and thus cannot make the MOS transistor Q
13
absorb the momentary current I
11
mentioned just above. This causes a momentary rise in the base voltage of the transistor Q
8
, which is thus turned on, causing an unnecessary write current to flow via the output terminal
24
. This is the reason that there is a possibility of the write current I
7
or I
8
being unnecessarily fed to the magnetic head
2
. Permitting such a flow of the write current I
7
or I
8
results in noise being written to the magnetic disk (not shown). Accordingly, in a magnetic recording apparatus, it is desirable in the first place that the flow of a write current such as I
7
or I
8
be inhibited in a transient period such as when electric power has just started being supplied.
SUMMARY OF THE INVENTION
An object of the present invention is to provide a magnetic recording apparatus in which, when electric power has just started being supplied, generation of a write current is inhibited to prevent noise.
To achieve the above object, according to the present invention, a magnetic recording apparatus is provided with: a magnetic head for writing data to a magnetic disk; a writing circuit for feeding a write current to the magnetic head; and a temporary shutoff circuit for temporarily deactivating and thereafter activating the writing circuit when electric power starts being supplied.
According to this circuit configuration, when electric power starts being supplied, the temporary shutoff circuit suppresses, for example, the bias voltage output from the writing circuit. Thus, it is possible to prevent writing operation from being unnecessarily performed as a result of a transient current flowing through the magnetic head despite absence of data to be written. In this way, it is possible to prevent noise from being written to the magnetic disk before the bias voltage becomes stable after electric power starts being supplied.
REFERENCES:
patent: 4868691 (1989-09-01), Kawasaki
Arent Fox Kintner & Plotkin & Kahn, PLLC
Neal Regina Y.
Rohm & Co., Ltd.
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