Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field
Reexamination Certificate
2002-09-04
2003-11-04
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Magnetic field
C257S422000, C257S252000, C257S108000, C438S048000, C438S054000, C438S051000
Reexamination Certificate
active
06642595
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a magnetic random access memory (MRAM) and more particularly, to an MRAM with a low writingcurrent, characterized in that an improved MRAM structure is composed of a plurality of conductive metal pillars disposed on both sides of a magnetic tunnel:junction (MTJ) cell functioning as a mean of reducing the writing current.
2. Description of the Prior Art
A magnetic random access memory (MRAM) has advantages such as non-volatility, high integrity, high access speed and strong radiation resistance. When memory data is being read, a current source is provided into a selected memory cell so as to determine the digit value of the data by reading the voltage difference; however, when memory data is being written, a conventional MRAM array, as shown in FIG. 1 according to U.S. Pat. No. 5,640,343, employs two current lines (namely, a bit line
13
and a write line
11
) to select a magnetic memory cell
15
by inducing a magnetic field so as to change the magnetization orientation of the material and update the data.
In the field of MRAM, it is one of the main concerns to effectively collect the magnetic flux induced by the write line
11
through a memory cell. In FIG. 2 according to U.S. Pat. No. 5,940,319, which is a schematic cross-sectional view showing a conventional magnetic memory cell circuit, a dielectric layer
21
is formed on a magnetic memory cell
15
by deposition. Then, etching is employed to form windows for a first conductor
25
a
connected to a bit line
13
and a second conductor
25
b
connected to a current controlling element
23
. A high-permeability material
200
is formed on both the surface of the bit line
13
and the surface of the write line
11
excluding a surface facing magnetic memory element so as to shield and focus a magnetic field toward magnetic ,memory element. Therefore, the magnetic field through the magnetic memory cell
15
is enhanced, which results in a lowered writing current and thus reduced power consumption. The spacing between the write line
11
and the magnetic memory cell
15
can also be reduced so as to achieve the same object.
In order to enhance the magnetic field and thus lower the writing current, the present invention provides an improved MRAM structure by using a modified mask to obtain more magnetic flux induced by the infinite current lines around the magnetic memory cell
15
so as to reduce the fabrication cost.
SUMMARY OF THE INVENTION
Accordingly, it is the primary object of the present invention to provide a magnetic random access memory (MRAM) with a low write current.
In order to achieve the foregoing object, the present invention provides an MRAM with a low writing current, characterized in that an improved MRAM structure is composed of a plurality of conductive metal pillars disposed on both sides of a magnetic tunnel junction (MTJ) cell functioning as a memory cell. The conductive metal pillars generate a superposed magnetic field so as to reduce;the writing current into the MTJ cell, thereby reducing the power consumption during the operation of an MRAM. The metal pillars are formed by employing a modified layout so that a plurality of plugs are formed by via etching and metal deposition. Moreover, at least one turn of conductive metal coil is disposed near the memory cell. The enhanced magnetic field thus generated results in a lowered writing current as well as reduced power consumption.
In one preferred embodiment, the present invention provides an MRAM with a low writing current, composed of a plurality of magnetic memory elements, wherein each magnetic memory element comprising: a write line, providing said magnetic memory element with a write current channel; a bit line, providing said magnetic memory element with a write current channel and a read current channel; a magnetic memory cell, functioning as a magnetic material in said magnetic random access memory so as to change the magnetization orientation and thus the data state; a central metal via, connected to said magnetic memory cell and said bit line; and a plurality of side metal pillars, connected to said write line, so as to enhance the magnetic field through said magnetic memory cell induced by the current through said metal pillars; wherein said magnetic memory element outputs a read signal from a current controlling element.
Other and further features, advantages and benefits of the invention will become apparent in the following description taken in conjunction with the following drawings. It is to be understood that the foregoing general description and following detailed description are exemplary and explanatory but are not to be restrictive of the invention. The accompanying drawings are incorporated in and constitute a part of this application and, together with the description, serve to explain the principles of the invention in general terms.
REFERENCES:
patent: 5640343 (1997-06-01), Gallagher et al.
patent: 5940319 (1999-08-01), Durlam et al.
patent: 6331943 (2001-12-01), Naji et al.
patent: 6479848 (2002-11-01), Park et al.
patent: 6518588 (2003-02-01), Parkin et al.
patent: 6542398 (2003-04-01), Kang et al.
Hung Chien-Chung
Kao Ming-Jer
Bacon & Thomas PLLC
Huynh Andy
Industrial Technology Research Institute
Nelms David
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