Active solid-state devices (e.g. – transistors – solid-state diode – Responsive to non-electrical signal – Magnetic field
Reexamination Certificate
2002-04-22
2003-12-02
Nelms, David (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Responsive to non-electrical signal
Magnetic field
C257S423000, C257S273000
Reexamination Certificate
active
06657270
ABSTRACT:
BACKGROUND
1. Technical Field
A magnetic random access memory and a method for fabricating the same are are disclosed, and in particular a technology for fabricating a magnetic random access memory (abbreviated as ‘MRAM’) having a higher speed than static random access memory (SRAM) devices, an integration density as high as dynamic random access memory (DRAM) devices, and a property of a nonvolatile memory such as a flash memory is disclosed.
2. Description of the Background Art
Most of the semiconductor memory manufacturing companies have developed the MRAM using a ferromagnetic material and regard the MRAM as one of the next generation memory devices.
The MRAM is a memory device for storing and recalling information using multi-layer ferromagnetic thin films, and sensing current variations according to a magnetization direction of the respective thin films. The MRAM has a high operating speed, low power consumption and high integration density due to the special properties of the magnetic thin film. Additionally, the MRAM may be used in nonvolatile memory applications in which flash memory is presently used.
The MRAM uses a giant magneto resistive (abbreviated as ‘GMR’) phenomenon or a spin-polarized magneto-transmission (SPMT) that is generated when the spin polarization influences electron transmission.
The MRAM using the GMR phenomenon operates based on the fact that resistance varies remarkably when spin directions are different in two magnetic layers having a non-magnetic layer therebetween, which is one way to implement a GMR magnetic memory device.
The MRAM using the SPMT phenomenon operates based on the fact that larger current transmissions are generated when spin directions are identical in two magnetic layers having an insulating layer therebetween, which is one way to implement a magneto-transmission junction memory device.
However, MRAM research is still in its early stage, and is mostly concentrated on the formation of multi-layer magnetic thin films. Less research is in progress on a unit cell structure and a peripheral sensing circuit for MRAM technology.
FIG. 1
is a cross-sectional diagram illustrating a first example of a conventional MRAM.
Referring to
FIG. 1
, a gate electrode
33
, namely a first word line is formed on a semiconductor substrate
31
. Here, a gate oxide film
32
is formed on an interface between the gate electrode
33
and the semiconductor substrate
31
.
Source/drain junction regions
35
a
and
35
b
are formed on the semiconductor substrate
31
at both sides of the first word line
33
, and a reference voltage line
37
a
and a first conductive layer
37
b
are formed to contact the source/drain junction regions
35
a
and
35
b
. Here, the reference voltage line
37
a
is formed during the formation process of the first conductive layer
37
b.
Thereafter, a first interlayer insulating film
39
is formed to planarize the whole surface of the resultant structure, and a first contact plug
41
is formed to expose the first conductive layer
37
b.
A second conductive layer, which is a lower read layer
43
contacting the first contact plug
41
, is patterned.
A second interlayer insulating film
45
, which planarizes the whole surface of the resultant structure, is formed, and a second word line that is a write line
47
, is formed on the second interlayer insulating film
45
.
A third interlayer insulating film
48
, which planarizes the upper portion of the second word line that is the write line
47
, is then formed.
A second contact plug
49
is formed to expose the second conductive layer
43
.
A seed layer
51
is formed to contact the second contact plug
49
. Here, the seed layer
51
is formed to overlap between the upper portion of the second contact plug
49
and the upper portion of the write line
47
.
Thereafter, a semi-ferromagnetic layer (not shown), a pinned ferromagnetic layer
55
, a tunnel barrier layer
57
and a free ferromagnetic layer
59
are stacked on the seed layer
51
, thereby forming a magnetic tunnel junction (MTJ) cell
100
having a pattern size approximately as large as the write line
47
and that overlaps the write line
47
.
At this time, the semi-ferromagnetic layer prevents the magnetization direction of the pinned layer from being changed, and the magnetization direction of the pinned ferromagnetic layer
55
is fixed to one direction. The magnetization direction of the free ferromagnetic layer
59
can be changed by generated magnetic field, and information of ‘0’ or ‘1’ can be stored according to the magnetization direction of the free ferromagnetic layer
59
.
A fourth interlayer insulating film
60
is formed over the resultant structure, and evenly etched to expose the free ferromagnetic layer
59
. An upper read layer, namely a bit line
61
, is formed to contact the free ferromagnetic layer
59
.
Still referring to
FIG. 1
, the structure and operation of the MRAM will now be explained.
The unit cell of the MRAM includes one field effect transistor having the first word line as a read line for reading information, the MTJ cell
100
and the second word line
47
, which is a write line that determines the magnetization direction of the MTJ cell
100
by forming an external magnetic field by applying current. The MRAM also includes the bit line
61
, which is an upper read layer informing the magnetization direction of the free layer, by applying current to the MTJ cell
100
in a vertical direction.
Here, during the operation of reading information from the MTJ cell
100
, a voltage is applied to the first word line
33
as the read line, thereby turning the field effect transistor on, and the magnetization direction of the free ferromagnetic layer
59
in the MTJ cell
100
is detected by sensing a magnitude of current applied to the bit line
61
.
During the operation of storing the information in the MTJ cell
100
, while maintaining the field effect transistor in an off state, the magnetization direction in the free ferromagnetic layer
59
is controlled by a magnetic field generated by applying current to the second word line
47
, which is the write line, and the bit line
61
.
At this time, when current is applied to the bit line
61
and the write line
47
at the same time, a cell at a vertical intersecting point of the two metal lines can be selected. In addition, the operation of the MTJ cell
100
in the MRAM will now be described.
When the current flows in a vertical direction in the MTJ cell, a tunneling current flows through an insulating film.
When the tunnel barrier layer and the free ferromagnetic layer have the same magnetization direction, the tunneling current increases.
When the tunnel barrier layer and the free ferromagnetic layer have different magnetization directions, the tunneling current decreases. This is referred to as a tunneling magneto resistance (TMR) effect.
A decrease in the magnitude of the current due to the TMR effect is sensed, and thus the magnetization direction of the free ferromagnetic layer is sensed, thereby detecting the information stored in the cell.
FIG. 2
is a cross-sectional diagram illustrating a second example of the conventional MRAM.
As illustrated in
FIG. 2
, an element isolating film (not shown) defining an active region is formed on a semiconductor substrate
111
.
A gate electrode
113
having a gate oxide film
112
is formed on the active region of the semiconductor substrate
111
, an insulating film spacer (not shown) is formed at the side walls thereof, and source/drain regions
115
a
and
115
b
are formed by implanting impurities to the active region of the semiconductor substrate
111
, thereby forming a transistor. Here, the gate oxide film
112
is positioned on an interface between the gate electrode
113
and the semiconductor substrate
111
.
The closer the MTJ cell
100
of the MRAM and the gate electrode
113
, which is used as the write line, are positioned, the more the magnetic field is increased. Accordingly, an interlayer insulating film is formed in a succeeding process in a reduced thickness.
The ga
Kang Hee Bok
Kim Chang Shuk
Lee Sun Ghil
Hynix / Semiconductor Inc.
Marshall & Gerstein & Borun LLP
Nelms David
Nguyen Thinh T.
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