Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
1999-06-24
2001-01-16
Picardat, Kevin M. (Department: 2822)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C438S171000, C438S210000, C365S171000, C365S173000
Reexamination Certificate
active
06174737
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a magnetic random access memory (MRAM) and a fabricating method thereof, and more particularly, to an MRAM device integrated with circuitry which is formed under a complementary metal oxide semiconductor (CMOS) process.
BACKGROUND OF THE INVENTION
A magnetic memory element has a structure which includes ferromagnetic layers separated by a non-magnetic layer. Information is stored as directions of magnetization vectors in magnetic layers. Magnetic vectors in one magnetic layer, for instance, are magnetically fixed or pinned, while the magnetization direction of the other magnetic layer is free to switch between the same and opposite directions as information which are called “Parallel” and “Antiparallel” states, respectively. In response to Parallel and Antiparallel states, the magnetic memory element represents two different resistances. The resistance indicates minimum and maximum values when the magnetization vectors of two magnetic layers point in substantially the same and opposite directions, respectively. Accordingly, a detection of changes in resistance allows an MRAM device to provide information stored in the magnetic memory element.
An MRAM device integrates magnetic memory elements and other circuits, for example, a control circuit for magnetic memory elements, comparators for detecting states in a magnetic memory element, input/output circuits, etc. These circuits are fabricated in the process of CMOS technology in order to lower the power consumption of the MRAM device. The CMOS process requires high temperature steps which exceeds 300° C. for depositing dielectric and metal layers and annealing implants, for example.
Magnetic layers employ ferromagnetic material such as CoFe and NiFeCo which requires processing below 300° C. in order to prevent intermixing of magnetic materials caused by high temperatures. Accordingly, magnetic memory elements need to be fabricated at a different stage after CMOS processing.
Magnetic memory elements contain components that are easily oxidized and also sensitive to corrosion. To protect magnetic memory elements from degradation and keep the performance and reliability of the MRAM device, a passivation layer is formed over magnetic memory elements.
In addition, a magnetic memory element includes very thin layers, some of them are tens of angstroms thick. The performance of the magnetic memory element is sensitive to the surface conditions on which magnetic layers are deposited. Accordingly, it is necessary to make a flat surface to prevent the characteristics of an MRAM device from degrading.
Metal lines are employed to produce magnetic fields for writing and/or reading states in a magnetic memory element. Less amount of current is desired to minimize power consumption.
Accordingly, it is a purpose of the present invention to provide an improved MRAM device which prevents a magnetic memory element from thermal degradation while fabricating the device.
It is another purpose of the present invention to provide an improved MRAM device which prevents a magnetic memory element from oxidation and corrosion.
It is a further purpose of the present invention to provide an improved MRAM device which reduces power consumption of the device.
It is a still further purpose of the present invention to provide a method of integrating an improved MRAM device into a CMOS process.
SUMMARY OF THE INVENTION
These needs and others are substantially met through provision of a magnetoresistive random access memory (MRAM) which includes magnetic memory elements on circuitry for controlling operations of magnetic memory elements. First, the circuitry is formed on a substrate under the CMOS process which requires a heat treatment of 300° C. or more. While fabricating the circuitry, conductive lines are also formed, which are used to create magnetic fields for writing and/or reading states in the magnetic memory element. The metal lines are enclosed by high permeability material such as a permalloy layer which facilitates magnetic fields to concentrate on the magnetic memory element. After completion of the circuitry, a surface of a layer including the circuitry is polished by the chemical mechanical polishing (CMP) process which produces a flat surface on the layer including the circuitry, then the magnetic memory element is formed thereon. The flat surface prevents the characteristics of the magnetic memory element from degrading. Fabrication of the magnetic memory element after the CMOS process improves the performance and reliability of the magnetic memory element and avoids thermal degradation of the magnetic memory element.
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Chen Eugene
Durlam Mark
Kerszykowski Gloria
Kyler Kelly W.
Slaughter Jon
Koch William E.
Motorola Inc.
Picardat Kevin M.
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