Semiconductor device manufacturing: process – Making device or circuit responsive to nonelectrical signal
Reexamination Certificate
2004-02-02
2004-09-28
Nelms, David (Department: 2818)
Semiconductor device manufacturing: process
Making device or circuit responsive to nonelectrical signal
C438S003000
Reexamination Certificate
active
06797536
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a magnetic memory device which writes information by a current magnetic field every bit and reads out pieces of information “1” and “0” by a resistance change depending on the cell magnetization state, and a manufacturing method thereof.
2. Description of the Related Art
MRAMs (Magnetic Random Access Memories) have recently been proposed as a nonvolatile, high-speed device with a high integration degree and high reliability. As an MRAM memory element, MTJ (Magnetic Tunnel Junction) elements which exhibit a larger read output than that of a GMR (Giant Magneto-Resistance) element have enthusiastically been developed.
In the basic structure of the MRAM, as shown in
FIG. 51
, an MTJ element is arranged at the node between a bit line BL and a write word line WWL. The MTJ element is connected to the bit line BL via an upper metal layer (not shown) and to the source/drain of a MOS transistor Tr via a lower metal layer
64
. The gate of the MOS transistor Tr functions as a read word line RWL.
The MTJ element is made up of a magnetically fixed layer (magnetic pinning layer)
60
of a ferromagnetic layer connected to the lower metal layer
64
, a magnetic recording layer (magnetic free layer)
61
of a ferromagnetic layer connected to the bit line BL via an upper metal layer (not shown), and a tunnel junction layer
62
of a nonmagnetic layer sandwiched between the magnetically fixed layer
60
and the magnetic recording layer
61
.
Data write/read in/from the MRAM will be explained with reference to
FIGS. 52A and 52B
.
Write of data in an arbitrarily selected cell will be explained with reference to
FIG. 52A. A
current flowing in the upward direction with respect to the sheet surface of
FIG. 52A
generates a magnetic field counterclockwise, and the magnetization of the magnetic recording layer
61
orients right. The magnetization directions of the magnetically fixed layer
60
and magnetic recording layer
61
coincide with each other (which is called parallel magnetization). In this state, for example, data “0” is stored. A current flowing in the downward direction with respect to the sheet surface of
FIG. 52A
generates a magnetic field clockwise, and the magnetization of the magnetic recording layer
61
orients left. The magnetization directions of the magnetically fixed layer
60
and magnetic recording layer
61
become different from each other (which is called anti-parallel magnetization). In this state, for example, data “1” is stored.
Read of data from a selected cell in which data “1” or “0” is written will be described with reference to FIG.
52
B. When the magnetization of the MTJ element is parallel, its resistance is lowest; when the magnetization of the MTJ element is anti-parallel, its resistance is highest. By supplying a current through the MTJ element, the resistance of the MTJ element is read to determine a “1” or “0” memory state.
In order to rewrite data of a memory cell in this MRAM, the magnetization of the recording layer (e.g., an NiFe thin film with a film thickness of 2 to 5 nm) of the MTJ element must be switched. A magnetic field H necessary to switch the magnetization is given by equation (1). In equation (1), Ms is the saturation magnetization of the recording layer, t is the thickness of the recording layer, and F is the width of the recording layer.
H
to 4
&pgr;Ms×t/F
(
Oe
) (1)
When the cell width and cell length of the MTJ element are about 0.6 &mgr;m and about 1.2 &mgr;m, respectively, the write current value is about 8 mA.
Ensuring thermal agitation resistance poses limitations on decreasing the thickness of the recording layer of the MTJ element. To miniaturize the MTJ element up to about 0.15 &mgr;m, the recording layer must be made thick. Even if the film thickness of a CoFeNi recording layer can be fixed to 2 nm, a smaller-size MTJ element (smaller recording layer width F) increases the switching magnetic field H. This requires a large write current.
The current density which can be supplied to the write wiring has an upper limit (e.g., the current density is 10
7
A/cm
2
for Cu wiring). Hence, even if the write current must be increased along with the above-mentioned miniaturization of the MTJ element, the sectional area of the write wiring decreases with the shrink in cell size. A current which generates the switching magnetic field H necessary to switch the magnetization of the recording layer cannot be supplied to the write wiring.
In the conventional wiring without any yoke, the write current which generates the switching magnetic field H must be increased along with the shrink in cell size (decrease in recording layer width F), as shown in FIG.
53
. However, a current which can be supplied to the write wiring is restricted due to the decrease in the sectional area of the write wiring. The cell can only shrink in feature size to about 1/F=8.
To solve this problem, wiring with a yoke (see
FIG. 54
) prepared by covering write wiring (Cu) with a soft magnetic material
63
such as NiFe has been proposed. In the wiring with a yoke, the generated magnetic field of the write wiring can be concentrated on a selected cell by the yoke. It is reported that the wiring with a yoke exhibits about double the efficiency (write current value of 1/2) (see, e.g., Saied Tehrani, “Magneto resistive RAM”, IEDM short course, USA, 2001).
At present, demands have arisen for a further decrease in write current for a smaller cell.
BRIEF SUMMARY OF THE INVENTION
According to the first aspect of the present invention, there is provided a magnetic memory device comprising first wiring which runs in a first direction, second wiring which runs in a second direction different from the first direction, a magneto-resistance element which is arranged between the first wiring and the second wiring at an intersection between the first wiring and the second wiring, a first yoke main body which covers at least either of a lower surface and two side surfaces of the first wring, a second yoke main body which covers at least either of an upper surface and two side surfaces of the second wiring, first and second yoke tips which are arranged on two sides of the magneto-resistance element in the first direction at an interval from the magneto-resistance element, and third and fourth yoke tips which are arranged on two sides of the magneto-resistance element in the second direction at an interval from the magneto-resistance element.
According to the second aspect of the present invention, there is provided a magnetic memory device manufacturing method, comprising forming first wiring, at least either of a lower surface and two side surfaces of which is covered with a first yoke main body, forming on the first wiring a magneto-resistance element which is sandwiched between first and second layers, forming an insulating film on the first wiring and the second layer, forming a magnetic film on the insulating film, patterning the magnetic film, removing part of the second layer, the magnetic film, and the insulating film on the magneto-resistance element to form first to fourth yoke tips from the magnetic film in self-alignment with the magneto-resistance element, forming second wiring on the second layer and the first to fourth yoke tips, and forming a second yoke main body which covers at least either of an upper surface and two side surfaces of the second wiring.
REFERENCES:
patent: 6165607 (2000-12-01), Yamanobe et al.
patent: 6201259 (2001-03-01), Sato et al.
patent: 6548849 (2003-04-01), Pan et al.
Amano Minoru
Asao Yoshiaki
Hosotani Keiji
Kishi Tatsuya
Miyamoto Junichi
Kabushiki Kaisha Toshiba
Nguyen Thinh T
Oblon, Spivak, McClelland, Maier & Neustadt PC
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