Electricity: measuring and testing – Magnetic – Magnetometers
Reexamination Certificate
2001-03-20
2004-08-17
Patidar, Jay (Department: 2858)
Electricity: measuring and testing
Magnetic
Magnetometers
C324S11700H
Reexamination Certificate
active
06777932
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a magnetic field sensor which comprises a Hall element and an amplifier for amplifying the output voltage of the Hall element and which detects the magnetic field strength in the installed location so as to output a signal in accordance with the detected magnetic field strength.
A typical magnetic field sensor is a bipolar IC or a CMOS IC which include a Hall element for outputting an output voltage proportional to the magnetic field strength and an amplifier for amplifying an output voltage of the Hall element as well as a comparator for inputting the output voltage of the amplifier to be compared with a reference potential and for outputting the comparison result. Such a magnetic field sensor outputs an output signal of two values (0 or 1) showing whether the magnetic field strength of the location where the magnetic field sensor is installed is larger or smaller than a constant reference.
Another magnetic field sensor comprises a Hall element for outputting the output voltage proportional to the magnetic field strength and an amplifier for amplifying the output voltage of the Hall element and outputs the output signal of that amplifier as an analog signal, without change.
One of the major factors of dispersion in characteristics among the products of the magnetic field sensor is the dispersion of the offset signal component included in the output voltage of the Hall element. This occurs due to the stress, or the like, which is received by the Hall element body from the package. Another one is an offset signal component which exists at the input terminal of the amplifier (in general, a differential amplifier).
U.S. Pat. No. 4,037,150 discloses a technology which makes the influence of the offset signal component of the Hall element be small. A magnetic field sensor according to the invention described in U.S. Pat. No. 4,037,150 has a Hall element in a plate form with four terminals and the form of a Hall element is geometrically equal, as is that of the Hall element
1
described in
FIGS. 5 and 6
.
“Geometrically equal forms” means that the form under the condition of FIG.
5
and the form under the condition where the Hall element of
FIG. 5
is rotated by 90 degrees (it is rotated so that A-A′ agrees with B-B′ in
FIG. 5
) are the same, as is the Hall element
1
described in FIG.
5
.
A description is made in reference to FIG.
5
. The Hall element has two pairs of terminals A-A′ and B-B′ in the diagonal direction. In the first phase (first timing) a power source voltage is applied across the terminals A-A′ and the output voltage across the terminals B-B′ is detected so as to be stored in memory. Next, a power source voltage is applied across the terminals B-B′ at the second phase (second timing) and the output voltage across the terminals A-A′ is detected so as to be stored in memory. The switching of these actions is implemented by the switch circuit
24
.
Here, a circuit for applying a power source voltage to the Hall element is not shown in every figure.
The timing chart for the first and the second phases is described in
FIG. 7. A
sum is gained between an output signal of the first phase and an output signal of the second phase and, then, an effective signal component of an output signal of the Hall element is added in the same phase so as to be doubled while an offset signal component of an output signal of the Hall element is added in the negative phase so as to be mutually canceled. In this manner, the influence given to the output signal by the offset signal component of the Hall element is suppressed.
Next, the configuration of a conventional magnetic field sensor which compensates the offset signal component due to the input offset of the amplifier is described in reference to
FIGS. 5 and 6
.
FIG. 5
shows a configuration of a magnetic field sensor according to the first prior art as disclosed in the Japanese unexamined patent publication H8(1996)-201491. In
FIG. 5
, a Hall element is denoted as
1
, a switch circuit is denoted as
24
, capacitors which are memory elements are denoted as
4
and
6
, switches are denoted as
5
and
8
, voltage-current conversion amplifiers, each of which has high input and output impedance and converts a input voltage into a current so as to be outputted, are denoted as
10
and
11
, and a resistance is denoted as
12
.
In the first phase, the first phase signal (a) which has a pulse is given to the switch
5
while in the second phase, the second phase signal (b) which has a pulse is given to the switch
8
. In addition, the first and the second phase signals are given to the switch circuit
24
.
The relationship between the first phase and the second phase in the first prior art is shown in FIG.
7
.
The operation in the first phase is described.
In the first phase the switch
5
is closed while the switch
8
is open. At this time, a power source voltage is applied across the terminals A-A′ of the Hall element
1
so that the output voltage across the terminals B-B′ is outputted through the switch circuit
24
. The output voltage of that Hall element
1
is inputted to the voltage-current conversion amplifier
10
.
The voltage-current conversion amplifier
10
outputs a current which is proportional to the output voltage of the Hall element
1
. The output current IOUT of the voltage-current conversion amplifier
10
is represented as in the following equation.
IOUT=&agr;
(
Vh+Voff
10
) (1)
Voff
10
is an input offset voltage of the voltage-current conversion amplifier
10
and Vh is an output voltage of the Hall element (input voltage of the voltage-current conversion amplifier
10
). &agr; is a conversion coefficient (proportional constant) from voltage to current.
The resistance value of a Hall element has a great dispersion among products. In general, when the resistance value of a Hall element is small, the output voltage of the Hall element becomes large and when the resistance value of the Hall element is large, the output voltage of the Hall element becomes small.
This current flows into the capacitors
4
and
6
via the switch
5
. A voltage-current conversion amplifier
11
which has the same functions as the amplifier
10
generates a current which is proportional to a differential voltage between the charging voltage of the capacitor
4
and the charging voltage of the capacitor
6
and which is in the opposite direction to the direction of a current of the voltage-current conversion amplifier
10
. Charging current to the capacitors
4
and
6
stops when the sum of the respective output currents of the voltage-current conversion amplifiers
10
and
11
becomes zero. At this time, since the directions of the output currents of the respective voltage-current conversion amplifiers
10
and
11
are opposite to each other, the absolute values of the respective output currents of the voltage-current conversion amplifiers
10
and
11
agree. Accordingly, the output current IOUT
2
of the voltage-current conversion amplifier
11
can be represented in the following equation.
IOUT
2
=−&agr;(
Vh+Voff
10
) (2)
Next, the operation in the second phase is described.
In the second phase, the switch
5
is open and the switch
8
is closed. At this time, since the charging and discharging currents for the capacitors
4
and
6
do not flow, the capacitors
4
and
6
maintain the charges (accordingly, voltage) stored in the first phase. Accordingly, the voltage-current conversion amplifier
11
makes the current of the same value as of the current in the first phase keep flowing. The output current IOUT
2
of the voltage-current conversion amplifier
11
is represented in the equation (2).
At this time, a power source voltage is applied across the terminals B-B′ of the Hall element
1
so that the output voltage across the terminals A-A′ is outputted through the switch circuit
24
. The output voltage of that Hall element
1
is in
Hara Jun-ichiro
Hatanaka Tadata
Nguyen Vincent Q.
Patidar Jay
Pearne & Gordon LLP
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